FIG. 5 illustrates emitter driver output current versus time. The graph 500 depicts the combination of a red LED drive current 510 and an IR drive current 560. The solid line graph 502 illustrates drive currents having a high duty cycle. The dashed line graph 504 illustrates drive currents having a low duty cycle. In a typical pulse oximeter, the duty cycle of the drive signals is constant and provides sufficient dark bands 508 to demodulate the detector response into red and IR channels. The emitter drivers 480 (FIG. 4), however, require a significant portion of the overall pulse oximeter power budget. Intermittently reducing the drive current duty cycle can advantageously reduce power dissipation without compromising signal integrity. As an example, a low power pulse oximeter implementation nominally consuming 500 mw may be able to reduce power consumption on the order of 70 mw by such drive current duty cycle reductions. In a preferred embodiment, the drive current duty cycle is varied within a range from about 25% to about 3.125%. In a more preferred embodiment, the drive current duty cycle is intermittently reduced from about 25% to about 3.125%. In conjunction with an intermittently reduced duty cycle or as an independent sampling mechanism, there may be a “data off” time period longer than one drive current cycle where the emitter drivers 480 (FIG. 4) are turned off. The detector front-end 490 (FIG. 4) may also be powered down during such a data off period, as described with respect to FIGS. 8 and 9, below.
FIG. 6 is a graph 600 of a pre-processor output signal610 over time depicting the result of intermittent sampling at the detector front-end 490 (FIG. 4). The output signal 610 is a red channel 412 (FIG. 4) or an IR channel 414 (FIG. 4) output from the pre-processor 410 (FIG. 4), which is input to the post processor 430(FIG. 4), as described above. The output signal 610has “on” periods 612, during which time the detector front-end 490 (FIG. 4) is powered-up and “off” periods614, during which time the detector front-end 490(FIG. 4) is powered-down. The location and duration of the on periods 612 and off periods 614 are determined by the front-end control 364 (FIG. 4).
Also shown in FIG. 6 is a corresponding timeline 601of overlapping data blocks 700, which are “snap-shots” of the pre-processor output signal 610 over specific time intervals. Specifically, the post processor 430 (FIG. 4) processes a sliding window of samples of the pre-processor output signal 610, as described with respect to FIGS. 7A-B, below. Advantageously, the post processor 430 (FIG. 4) continues to function during off portions 614, marking as invalid those data blocks 640 that incorporate off portions 614. A freshness counter can be used to measure the time period 660between valid data blocks 630, which can be displayed on a pulse oximeter monitor as an indication of confidence in the current measurements.
FIGS. 7A-B illustrate data blocks 700, which are processed by the post processor 430 (FIG. 4). Each data block 700 has n samples 702 of the pre-processor output and corresponds to a time interval704 of n/fs, where fs is the sample frequency. For example, in one embodiment n=600 and fs=62.5 Hz. Hence, each data block time interval 704 is nominally 9.6 sec.
As shown in FIG. 7A, each data block 700 also has a relative time shift 706 from the preceding data block, where is an integral number of sample periods. That is, =m/fs, where m is an integer representing the number of samples dropped from the preceding data block and added to the succeeding data block. In the embodiment described above, m=75 and =1.2 sec, nominally. The corresponding overlap 708 of two adjacent data blocks 710, 720 is (n−m)/fs. In the embodiment described above, the overlap 708 is nominally 9.6 sec−1.2 sec=8.4 sec. The greater the overlap 708, i.e. the smaller the time shift 706, the more data blocks there are to process in the post-processor 430 (FIG. 4), with a corresponding greater power consumption. The overlap 708 between successive data blocks 710, 720 may vary from n−1 samples to no samples, i.e. no overlap. Also, as shown in FIG. 7B, there may be a sample gap 756 or negative overlap, i.e. samples between data blocks that are not processed by the post-processor, allowing further post-processor power savings. Sample gaps 756 may correspond to detector front-end off periods 614 (FIG. 6).