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SMSL M500 Teardown & ESS ES9038Pro DAC Thermal Analysis

KSTR

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They would need the APx555 to make this kind of analysis. Since they don't, ours is the only place this kind of analysis can happen.
APx555 makes it kind of easier. But a good and stable(!) audio interface like the Adi-2 Pro, plus a passive notch filter, plus competent software (REW, perhaps some own code for post-processing) any change of harmonics/spuriae etc is easily detected, IMHO.
 

trl

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The ESS DAC chip doesn't get hot at all playing 16 bit/44.1 kHz. Maybe it gets hot at much higher data rate. But for standard formats, it doesn't need a heatsink.
Maybe the small SMD regulators nearby are overloaded? This DAC chip can eat even 500mW sometimes, so perhaps the regulators might overheat, especially if the drop-voltage is higher than 3-4 volts.

After all, something definitely is overheating there, right? Or is it a hidden thermistor somewhere on the PCB and the SMSL's built-in firmware reads the data from it and then changes some parameters on the decoding? :)
 

KSTR

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It remains a mystery why the sample I have works in reverse. It may be that it is a DAC chip that is working above its spec when cold and only degrades when it gets colder.
Typical sign of some cancellation going on. (At least) two mechanisms with different tempcos. The point where they neutralize best can be very process-dependant with large chip-to-chip variations and probably ESS didn't implement a individual trimming to get the minimum at a typical expected operation temperature.
 

MusicNBeer

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My favourite bit :p
I can't move, so it looks like it's higher A/C bills.
Thanks a lot for the work @amirm! That was super interesting.

I can't believe the ESS data sheet is so sparse. That's a red flag. I work with RF ADC/DACs and the data sheets are loaded with all the non ideal behavior details. My next DAC will be AKM.
 

renaudrenaud

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Thanks a lot for all this information. Im am also happy to see SMSL was not selecting a gold sample for the test, problem is elsewhere, in thermal management.
 

Alerma

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@amirm you have demonstrated a negative effect of heating applied on ess chip of retail version. Would be much more interesting to see an effect of cooling. If positive then installation of a heatsink can be justified
 

w1000i

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I remember long time ago some SD mobile CPUs where able to be overclock higher than other duo better yeilds maybe.

I thought to add heatsink before this review and now I have to :p
 

pozz

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Typical sign of some cancellation going on. (At least) two mechanisms with different tempcos. The point where they neutralize best can be very process-dependant with large chip-to-chip variations and probably ESS didn't implement a individual trimming to get the minimum at a typical expected operation temperature.
The above makes me think of the unexplained issues in the first Benchmark DAC3 unit @amirm tested, which weren't there in the second unit:
 

filo97s

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A little bird share the data sheet for ESS ES9038Pro. There is not one performance graph in there in my quick look!
Neither in the 9038Q2M datasheet nor in all the AKM ones... Only Texas Instruments perform such type of analysis (TI is one of the few manufacturers that put everything possible in their datasheets, they have some of the most readable and informative datasheet around). This is an extract from the PCM1794A:
Cattura5.JPG
Analog Devices include graphs of nonlinearity errors and gain error vs temperature only in non-audio dacs (like the AD5791 used in Yggdrasil)
 

gvl

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The ESS DAC chip doesn't get hot at all playing 16 bit/44.1 kHz. Maybe it gets hot at much higher data rate. But for standard formats, it doesn't need a heatsink.

If memory serves it is spec'd to consume 0.5W at 192kHz sampling. Not insignificant given the size.
 

Biblob

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I could not help but imagine @MC_RME reading this and smiling over all the nonsense they do not have to deal with, thanks to using AKM DACs.
I wonder if the AKM chips are easier to work with, or that they have their own faults/troubles.
 

NTomokawa

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Very, very interesting observations.

How two identical units demonstrate opposite characteristics is quite a mystery indeed.
 

BostonJack

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Indeed, I wonder if ESS' secret datasheet has any measurements like we are performing.

Most of my experience is with digital integrated circuits. There the post-silicon verification consists of a lot of testing within the design 'box' of high/low limits for power supply voltage; clock rate; and temperature. In general, analog or mixed signal chips have several temp coefficients to balance in the design. Digital chips have very small geometries (7 nm, anyone?) and requisite tight process controls and physical design niceties that need to be well handled to keep the voltage/clock/temp box large enough to be practicable.

That's a long winded way of saying that having tight temp windows on a precision analog design is *not* a surprise.

Mounting technique (within the package and outside the package) and package type have major effects on die temp. its all interrelated.

Generally speaking, a lot of specs are publicly presented for nominal conditions. ESS should have a fairly precise characterization of the device's behavior across temp variations. Plus process variations do occur and they may be 'binning' parts based upon temp sensitivity.
 
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