Is GaN worth it? ICEpower article

[boXem]

Non-engineer question: Do the 'idle power benefits' apply only when no signal is present, or would there be some partial benefit when the signal is at low amplitude? As we know, the RMS of music is pretty low compared to peak values most of the time.

Portable speakers don't often sit idle for very long (auto-off with no signal after ~5 mins is common) but if the efficiency also applies to some extent when it's not 100% idle I could see it being helpful.

- The idling losses are the starting point for the efficiency versus poser, the higher they are, the worse the efficiency in general
- As you guessed, the amplifier spends most of it's time idling in home usage.

One point that the guys from ICE didn't dare to mention (understandably) is that GaN FETs are not the only solution for low idling losses. Purifi modules are the perfect example for this with 1.5W idling losses per channel.

 

[kemmler3D]

Purifi modules are the perfect example for this with 1.5W idling losses per channel.

Fair point, but 3w @ idle is still quite a bit of power for a portable battery powered stereo. When it comes to portables, designers will take any efficiency they can get as long as it's cost effective against adding a bigger battery. Batteries are expensive not just because of the upfront cost, but the more cells you have in a package, the more failures you will need to deal with for returns/warranties etc.

 

[boXem]

Fair point, but 3w @ idle is still quite a bit of power for a portable battery powered stereo. When it comes to portables, designers will take any efficiency they can get as long as it's cost effective against adding a bigger battery. Batteries are expensive not just because of the upfront cost, but the more cells you have in a package, the more failures you will need to deal with for returns/warranties etc.

Well, we are talking about a 2x400W amp, not really designed to be battery operated. I was providing this example because when @amirm measured the idling losses of a GaN amp of similar power, results were no better.
If the techniques used by Purifi to lower idling losses from their amps would be ported (pun intended) to amp for portable speakers, significant progress would be done, without changing tech, with all the advantages associated.

 

[Sokel]

As far as I know (and they have some short of promised) their line will go up to 5kW (peak for 90 sec or so at 1% THD+N obviously,as they do with the smaller ones) .
The idle for such an amp will be considerable,as full bridge gives a little penalty too.

Maybe that's the reason they search about it?

 

[boXem]

As far as I know (and they have some short of promised) their line will go up to 5kW (peak for 90 sec or so at 1% THD+N obviously,as they do with the smaller ones) .
The idle for such an amp will be considerable,as full bridge gives a little penalty too.

Maybe that's the reason they search about it?

SiC is more promising for ultra high power stuff.

 

[Sokel]

SiC is more promising for ultra high power stuff.

Lets hope they stick to their logo then (Music at All Times),which they have gone great lengths to maintain it ,most of their protections are about that.

 

[DonH56]

Non-engineer question: Do the 'idle power benefits' apply only when no signal is present, or would there be some partial benefit when the signal is at low amplitude? As we know, the RMS of music is pretty low compared to peak values most of the time.

Portable speakers don't often sit idle for very long (auto-off with no signal after ~5 mins is common) but if the efficiency also applies to some extent when it's not 100% idle I could see it being helpful.

At low amplitude the benefits will be there. Class D is (except for certain special fancy designs) always switching, so at idle and low levels is mostly bouncing between say +V and -V equally. As the signal gets larger, more time is spent at the top and bottom rails, as pulse width increases to provide more power. This article has more explanation and pictures about class D operation: https://www.audiosciencereview.com/forum/index.php?threads/class-d-amplifiers-101.7355/

Modern designs operate a little differently in the details, but the overall concept and waveforms are the same.

Portable designs can benefit, but GaN is expensive enough and hard enough to integrate with normal Si ICs that I have not seen it used much there (but again not something I have really looked for). A highly-integrated single-chip solution (in Si) will probably outweigh the benefits of GaN (which is not highly-integrated) for portable/micropower devices. (GaN is difficult to integrate with a Si substrate so tends to be external devices.) And turning the amp off is almost always going to be a lower-power solution.

There are also a number of other power devices available that provide high-power solutions, such as SOI (silicon on insulator) FETs, HEXFETs, SiC transistors, and some other Ga/GaAs/InP/etc. technologies beyond the scope of what I'd want to delve into here (even if I felt competent to do so). The SiC vs. GaN debate is fairly big, with different applications favoring one or the other devices, and (FD - Fully Depleted) SOI is big is some micropower applications, but this is not something I follow closely (or hardly at all).

Practically speaking, whilst GaN does offer advantages, my opinion is that for audio the advantage is mostly marketing ("Look, we have the latest technology!")

FWIWFM, my 0.000001 cent (microcent), etc. - Don

Edit: Duplicated some posts from @boXem -- he is using them in one of his amps, I think? Probably a more reliable source of info...

 

[ta240]

It seems well written but I'd rather read something from an impartial 3rd party.
A company that makes non-GaN amplifiers putting together a lot of information about how they aren't worth it seems more like marketing.

 

[ZolaIII]

@DonH56 I did follow development of SOI and FD-SOI and all do it was most promising for mixed and analog with or without back biasing it newer got wide adoption. Samsung has cuple moderate size fabs on 22 nm and ther were stories about EU and GlobalFoundries Inc and fab development and advances up to 12~10 nm it never really materialised. It's actually old story almost 40 years back and joint work of IBM and AMD at first.
Power savings were 40 to 60% compared to same size pre Fin Fet lithography but it cost just a little more (basically wafer price) than it and many times less then Fin Fet which whose never suitable for analog in the first place. Future more tools and development to silicone where cheap. FD-SOI example is Sony GPS IC which uses only half the energy. GAA is said to be fast and suitable for mixed and analog but it's price will be cuple times higher even then Fin Fet. So in short that's the biggest opportunity lost.

 

[DonH56]

@DonH56 I did follow development of SOI and FD-SOI and all do it was most promising for mixed and analog with or without back biasing it newer got wide adoption. Samsung has cuple moderate size fabs on 22 nm and ther were stories about EU and GlobalFoundries Inc and fab development and advances up to 12~10 nm it never really materialised. It's actually old story almost 40 years back and joint work of IBM and AMD at first.
Power savings were 40 to 60% compared to same size pre Fin Fet lithography but it cost just a little more (basically wafer price) than it and many times less then Fin Fet which whose never suitable for analog in the first place. Future more tools and development to silicone where cheap. FD-SOI example is Sony GPS IC which uses only half the energy. GAA is said to be fast and suitable for mixed and analog but it's price will be cuple times higher even then Fin Fet. So in short that's the biggest opportunity lost.

OK, interesting stuff! Early SOI had horrible back-gating issues, thresholds shifts, and nonlinearity issues due to charge traps and impurities in the insulator layer but it has been over a decade since I was involved at the device level. A couple of early adopters are out of business but I have lost track; you reminded me that it has seen use in some RF circuits as well as low-power processing chips for cell phones and such. FD-SOI seemed promising but was rising as I was shifting career paths. (Aside: I was working with IBM when they (Bernie) developed the SiGe HBTs I used in a number of projects; Fin FETs came much later, and I have tested devices using them, but never actually designed with them -- after my IC design time.) Fin FETs seem mixed for analog; should be much better in some ways than lateral FETs, but with some drawbacks and processing issues. And higher cost, natch. I know in some of the high-speed devices I helped test Fin FETs seemed a mixed bag in terms of power and performance (and yield). But it sounds like you have more experience than I with the devices -- I am pretty out of touch, just read an article that catches my eye now and then.

 

[ZolaIII]

@DonH56 I also retired from it cuple years back as it got too much to cope with. I evoluted IP's and whose primary interested in HPC, but didn't forget analog or mixed where we didn't really have major advances in very, very long time. Whose also interested in interconnections especially in FPGA's and also ADSP's on enterprise to user stand use case. Can't say I miss it much. Thing is that advanced lithography has become so expensive from design standpoint that very few can afford it and it's vicious circle preventing innovation.

 

[DonH56]

@DonH56 I also retired from it cuple years back as it got too much to cope with. I evoluted IP's and whose primary interested in HPC, but didn't forget analog or mixed where we didn't really have major advances in very, very long time. Whose also interested in interconnections especially in FPGA's and also ADSP's on enterprise to user stand use case. Can't say I miss it much. Thing is that advanced lithography has become so expensive from design standpoint that very few can afford it and it's vicious circle preventing innovation.

I retired last year but have been mostly out of transistor-level design for much longer. Mask costs are simply insane for things like 5~10 nm Fin FETs, as are wafer costs.

 

[Vacceo]

I think Lars Riisbo published a similar comparison and his conclusion was not too different: still to small improvements given the cost.

 

[wwenze]

Non-engineer question: Do the 'idle power benefits' apply only when no signal is present, or would there be some partial benefit when the signal is at low amplitude? As we know, the RMS of music is pretty low compared to peak values most of the time.

Portable speakers don't often sit idle for very long (auto-off with no signal after ~5 mins is common) but if the efficiency also applies to some extent when it's not 100% idle I could see it being helpful.

Idle power benefits also include when outputting signal at low amplitudes.

You can be outputting signal at 0V or 0.1V or 1V, doesn't matter, it's all small compared to what the amp is capable of.. And it will never be real 0V per-se because of noise.

Only when it's really outputting high signal voltage then RDS(on) losses start to dominate due to current flowing into the load.

 

[pablolie]

Which *very* specific use case are we discussing? Every material as pros and cons, and may be sometimes downright unfeasible for the application

 

[Vacceo]

Idle power benefits also include when outputting signal at low amplitudes.

You can be outputting signal at 0V or 0.1V or 1V, doesn't matter, it's all small compared to what the amp is capable of.. And it will never be real 0V per-se because of noise.

Only when it's really outputting high signal voltage then RDS(on) losses start to dominate due to current flowing into the load.

Idle can be quite interesting with juggernaut amps like an Apollon 12 channels, Marantz´s Amp10 and similar offers. Still, the part I´m not too sure about is the cost-benefit part.