Hi AmirmI can't digital capture I^2S.
Did you configure the I2S sequence of SU1?
I2S has many sequence.
SU1 can work well with X26,but you need to set it in correct configuration.
Hi AmirmI can't digital capture I^2S.
Because the configuration is incorrect, LRCLK is reversed.
The data of left and right channels are delayed by one sampling period.
So there was a phase delay of 8.168 degrees.
8.168*44.1=360.2088
My recollection is that the quality of the the RPi i2s clock is total pants and cant be integer divided into 44.1kHz.Only in implementation. The RPi has I2S wired straight from the SoC to the GPIO header. If you’re going to make a DAC that’s a Pi hat, I can’t think of much reason to not use it, as it’s right there and ready to use.
Ah, I didn't know that. Can't say I'm surprised though, RPi Foundation added it to the GPIO for sensor/device connections, not originally intended for audio.My recollection is that the quality of the the RPi i2s clock is total pants and cant be integer divided into 44.1kHz.
Hi there. You were right. Setting switch 6 to on fixed it. I will update the review.Hi Amirm
Did you configure the I2S sequence of SU1?
I2S has many sequence.
SU1 can work well with X26,but you need to set it in correct configuration.
Here are the results with GPLL bypassed:Can we see the results with Gustard's GPLL off?
Edit: Sorry, I meant ESS ASRC/jitter correction off when the DAC is fed the data over I2S, ie the DAC runs in sync mode.
ok,thanks.Hi there. You were right. Setting switch 6 to on fixed it. I will update the review.
Silly me, I thought once we got audio from the DAC, the configuration was correct. Not so.
Hi AmirmHere are the results with GPLL bypassed:
View attachment 23913
While not audible either way, jitter is worse with S/PDIF when you turn off GPLL.
Why does the I2S interface will be very popular?
Because it can support very high rates.
PCM 1.536M and dsd1024 can work well too.
now many I2S interface using LVDS signal and HDMI interface.
as we know ,the LVDS can work in 400mbps or 600mbps.
the HDMI-I2S has 4 signal channels.(with mclk)
In theory, it can provide transmission capacity of more than 1.6Gbps.
Sorry that was a typo. Should say dac-x26 spdif from su-1.Hi Amirm
This dx3pro spdif provided by Singxer SU-1 or Gustard U12 or Apx555?
Here are the results with GPLL bypassed:
View attachment 23913
While not audible either way, jitter is worse with S/PDIF when you turn off GPLL.
If you turn off it’s jitter reducing feature, sure.Hmm so objectively, the I2S does have the better jitter specs in this case?
This is correct. But you can configure the RPi to be the clock slave. So you can use an external clock to avoid this problem.My recollection is that the quality of the the RPi i2s clock is total pants and cant be integer divided into 44.1kHz.