I wonder if we'll ever see those parts from AKM again. I would still love to know why there is that feedback connection into the chip on the outputs of AK4499.
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ESS THD ‘Hump’ Investigation
- Thread starter jackenhack
- Start date
I wonder if we'll ever see those parts from AKM again. I would still love to know why there is that feedback connection into the chip on the outputs of AK4499.
As someone who worked more in software until recently, I find small distributors to be incredibly annoying. No, I don't want to meet with you and waste an hour to see your line card. No, I don't want to sign an NDA to get info that competitors already have but your customers don't. No, I am probably not going to design out a perfectly good chip only because you want us to buy your stuff.
If they offered meaningful support, that would be something, but they usually don't...
syn08
Senior Member
Yes, dusfor99 @DIYA was a wealth of information straight from the horse's mouth. Interesting enough, he claimed they are using AVCC/2=1.65V, which I was foolishly extrapolating to all the following chips. https://www.diyaudio.com/forums/dig...-reference-dac-8-channel-140.html#post1814598
Is that a recent addition to their catalogue? I thought ESS was only (un)available from Shaw Electronics who only specify prices for sample quantities.
I don't get it. You baulk at an opamp, but a microcontroller is OK? Does not compute.
All these products already had an MCU. They dropped hardware modes because only hobbyists used them.
All you have to do is look at pro audio over the past 20 years. They always buy voltage output DACs that require minimum components. They don't want more op-amps and more external parts and higher quiescent current draw. It costs board real-estate, too. Important in a higher channel count design. Smaller outfits like Benchmark are the exception.
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syn08
Senior Member
Exactly the opposite of the AKM representative in Canada. I made it clear up front I'm going to buy perhaps 10 chips, they invited me in, we talked about my projects, they even gave me an AKM programmer for free. Gave me the contact of an US based FAE, which was also very responsive answering technical questions. Unfortunately the AKM factory fire came and everything crumbled. The local representative told me about 2022 tentative to resume audio related production, but also mentioned this is an off the radar goal for now. High priority is to move the large volume products (for the auto industry) to foundries and Renesas (which were hit themselves by a fab fire a few days ago, oh the irony) otherwise there won't be a 2022 for them.
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I suspect he said too much for their liking
. AVCC/2 is the logical assumption, since it's optimal for almost every other single supply DAC and ADC on the planet.
syn08
Senior Member
Mouser distributes ESS products since last year, and the datasheets (more like multi-page puzzles that requires luck and inspiration to use, but at least there's something). But reference boards, app notes, etc... can be purchased (for a lot of money) only from Shaw, which are the uncooperative aholes I mentioned above. Try to get anything about the new ESS ES9822PRO ADC from them, good luck and stay cool.
Shaw used to be better, maybe the AKM fire has made them less eager to work with smaller customers. When the ES9018 came out I signed an NDA without even a company name and was offered samples.
I also had good experiences with AKM. When I was still an undergrad, AKM sent me 6 AK4396 samples for a project without even asking for them. I emailed some datasheet questions from a .edu address and they asked for my shipping address (thanks Richard if you're reading
).
KSTR
Major Contributor
Your certainly have a point here. Make your business survive, after all.
In this context it’s the virtual ground potential of the I/V converter op-amps. In DAC/ADC use it usually refers to the input or output common mode voltage of the converter, usually expected to be half of the reference voltage.
the ES9038Q2M datasheet is saying ANALOG OUTPUT(per + or –pin of each differential DAC output pair
Current mode output offset: bibolar zero out to virtual ground at voltage VG(V) 1000 x(VOPP -VG) / RDAC in mA
Voltage mode output offset: (VOCM) Bipolar zero out AVCC/ 2 in V
I guess it will be similar with the pro version.
syn08
Senior Member
And to conclude, this is probably the best of the best one could get out of a ES9038PRO chip in mono mode (8 channels in parallel).
THD was optimized using the ES9038PRO compensation registers (0x1C - 0x1F). The impact on the 2nd harmonic cancellation is quite effective, around 8dB, which is somehow to be expected; probably the THD adjustment compensates for some internal asymmetries. The 3rd harmonic compensation adjustment has a minimum impact (less than 1dB). BTW, the datasheet description of register 0xC which, among others, controls the THD adjustment enable/disable is correct, correction is enabled by default (after a reset), bit6=0 means 'enabled' in this case.
Unfortunately, the THD compensation depends both on the input level and frequency. For this particular experiment I set the input level @0.35FS and frequency 1KHz. Going to 0.5FS and 2KHz increases again the 2nd harmonic to about -120dB (3rd harmonic remains largely unchanged at about -129dB). I'm also logically suspecting that this distortion minima is chip dependent. So this distortion minimum is largely of academic interest anyway (since it is far from the audible threshold anyways).
I guess I can pat myself for getting -128dB 3rd harmonic in my implementation, that's 10dB better than the Gustard X26 Pro using the same chip in the same mode. I'll do eventually a frequency and input level scan and plot THDto see how "bad" this can get over the entire audio band .
AKM and Rohm, beat this
THD was optimized using the ES9038PRO compensation registers (0x1C - 0x1F). The impact on the 2nd harmonic cancellation is quite effective, around 8dB, which is somehow to be expected; probably the THD adjustment compensates for some internal asymmetries. The 3rd harmonic compensation adjustment has a minimum impact (less than 1dB). BTW, the datasheet description of register 0xC which, among others, controls the THD adjustment enable/disable is correct, correction is enabled by default (after a reset), bit6=0 means 'enabled' in this case.
Unfortunately, the THD compensation depends both on the input level and frequency. For this particular experiment I set the input level @0.35FS and frequency 1KHz. Going to 0.5FS and 2KHz increases again the 2nd harmonic to about -120dB (3rd harmonic remains largely unchanged at about -129dB). I'm also logically suspecting that this distortion minima is chip dependent. So this distortion minimum is largely of academic interest anyway (since it is far from the audible threshold anyways).
I guess I can pat myself for getting -128dB 3rd harmonic in my implementation, that's 10dB better than the Gustard X26 Pro using the same chip in the same mode
. I'll do eventually a frequency and input level scan and plot THDto see how "bad" this can get over the entire audio band .AKM and Rohm, beat this
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KSTR
Major Contributor
@syn08,
ADI-2 Pro FSR (AK4493) 1kHz@-3dBFS (green trace) : -128dB H2, -130dB H3 ;-)
Feed is from REW via USB.
(one of the many bugs of the UI can be seen here, the actual number of spectrum averages has been 64, not 4 as indicated in the caption)
At those HD levels we must be aware that partial cancelling might already take place, though
ADI-2 Pro FSR (AK4493) 1kHz@-3dBFS (green trace) : -128dB H2, -130dB H3 ;-)
Feed is from REW via USB.
(one of the many bugs of the UI can be seen here, the actual number of spectrum averages has been 64, not 4 as indicated in the caption)
At those HD levels we must be aware that partial cancelling might already take place, though
Skeptischism
Active Member
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take a look at the system syn08 posted and the following conversation, it is audio instrumentation. This site is at least as much about audio diagnostics gear, as it is audio itself ... is it not? does the word 'science' not immediately follow 'audio'?
syn08
Senior Member
Some comments regarding the possible origins of the "hump" in the ES9038 products:
- It appears to affect most of the ESS DACs (certainly the ES9028 and 9038 series).
- For the ES9038 that I was able to measure, the outputs are firmly biased at AVCC/2=1.65V
- The output impedance is indeed around 200ohm per output.
- When the I/V stage common mode voltage is set lower than the AVCC/2 bias voltage, then a DC current flows through the I/V resistor to account for the bias difference. Example: AVCC/2=1.65V Vcm=1V R=50ohm results in a current of (1.65-1)/200~3.2mA. For 8 outputs in parallel, this amounts for about 25mA.
- This current comes from the opamp negative supply, since it is sunk by the I/V opamp. It increases the I/V stage standby power dissipation by a significant margin.
- The displaced Vcm bias is used by ESS in their demo boards (at least for the ES9038 series).
- Essentially, we are dealing with two voltage sources, Vcm and AVCC/2 fighting, and the resulting current flows through the DAC output impedance.
- No idea on how the ESS output stages are designed, but the fact that such a current flow practically eliminates the distortion hump suggests a mechanism similar with displacing the gm "hump" in older op amps with bipolar outputs, by biasing the output with a current source. This method eliminates the gm doubling distortion "hump" generated by the op amp output stage.
- If this is correct, the "hump" is essentially because of the poor output impedance of the ESS outputs (200 ohm parallel, or the Thevenin equivalent series impedance). A poor output impedance is also typical for op amps that can be improved by biasing the output.
I am afraid that's all we can speculate and infer about the "hump" origin, lacking any information from ESS.
- It appears to affect most of the ESS DACs (certainly the ES9028 and 9038 series).
- For the ES9038 that I was able to measure, the outputs are firmly biased at AVCC/2=1.65V
- The output impedance is indeed around 200ohm per output.
- When the I/V stage common mode voltage is set lower than the AVCC/2 bias voltage, then a DC current flows through the I/V resistor to account for the bias difference. Example: AVCC/2=1.65V Vcm=1V R=50ohm results in a current of (1.65-1)/200~3.2mA. For 8 outputs in parallel, this amounts for about 25mA.
- This current comes from the opamp negative supply, since it is sunk by the I/V opamp. It increases the I/V stage standby power dissipation by a significant margin.
- The displaced Vcm bias is used by ESS in their demo boards (at least for the ES9038 series).
- Essentially, we are dealing with two voltage sources, Vcm and AVCC/2 fighting, and the resulting current flows through the DAC output impedance.
- No idea on how the ESS output stages are designed, but the fact that such a current flow practically eliminates the distortion hump suggests a mechanism similar with displacing the gm "hump" in older op amps with bipolar outputs, by biasing the output with a current source. This method eliminates the gm doubling distortion "hump" generated by the op amp output stage.
- If this is correct, the "hump" is essentially because of the poor output impedance of the ESS outputs (200 ohm parallel, or the Thevenin equivalent series impedance). A poor output impedance is also typical for op amps that can be improved by biasing the output.
I am afraid that's all we can speculate and infer about the "hump" origin, lacking any information from ESS.
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