It's OK dude - I do appreciate the advice, which is of course well meant. FYI I am an EE who has worked for a big US semi manufacturer and have a reasonably good understanding of ESD risks and mitigations in semiconductor electronics, and so feel comfortable with the solution I have implemented for myself. An ESD safe design doesn't require ground earthing of connected input and output devices as you imply, it generally means ensuring that introduced ESD pulses are directed away from paths which could take them into the most sensitive circuits (like the output opamps). Of course I cannot implement any PCB layout or component changes Topping may have added to further improve ESD safety but I can still reduce the key risk factor which is a charge jumping from me, to the vol pot and thence onto the PCB.
Connecting the chassis to the ground plane (as Topping has done with their pogo pin), and also doing the most to ensure an electrical connection of the front panel control shafts to this grounded chassis provides a much easier route for ESD discharges to dissipate safely than by flowing through the semiconductor devices on the PCB causing chaos. We are talking about many KV but very tiny currents in these discharges, and they can behave in really strange ways so this is not always simple to predict. Anyway you cannot eliminate ESD risk entirely whatever you do - it's a probability game.