Expensive DACs will have a few different crystal oscillators to support different clock rates. For instance, 45.1584Mhz and 49.152 Mhz, in order to support 44.1khz (and its multiples) and 48Khz (and its multiples) natively. So for those DACs, they have multiple native resolutions.
Others will process the PCM data to the only native clock rate available in the hardware, so may have higher jitter issue. For instance, the ODAC implementation only has a 12 Mhz clock, so both 44.1khz (and its multiples) and 48Khz (and its multiples) are converted to that rate. In theory 44.1khz may see a little bit higher jitter since the data processing may be slightly off phase. But if done well, the noise should be inaudible.