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- Nov 23, 2020
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In case anyone's wondering why I decided to go discrete, I actually started testing existing sigma-delta DAC chips first but could find none that didn't have idle tones. I suspect that is still the case. Chip manufacturers usually manage to move these out of the band at mid-scale (i.e. zero or small signal), but they show up in a THD vs level graph as a small increase in apparent noise typically starting at -20dBfs. Basically this "noise" are tones that are swept in and out of the audio band, frequency modulated by the signal. The simplest way of testing for this is to do a noise level vs DC input plot. The tones, when they appear, are well above the noise floor, even as integrated over the audio band. Using PWM as a conversion format solves this tone problem, but nobody is doing that on an IC. Hence the discrete design. I won't speculate on the audibility of this phenomenon but anything that is measurable is fair game for me. If people are going to shell out serious moolah for a DAC, least thing you can do is show an objectively provable benefit. Low jitter is also something I like to that's why we ended up coding our own ASRC algorithm.
Is it possible to do this noise level vs DC input measurement using the (say XLR) output of a DAC? Or will there be DC protection that stops the DAC from outputting DC on most DACs?