Topping D50 III Balanced DAC with EQ Review

[thewas]

Based on earlier posts in the thread, the computing for the PEQ filters is in cores in the USB chip, and presumably there is no practical way to route other external sources into the USB chip. So as undesirable as PEQ-only-on-USB is, at least there is an obvious HW constraint that forced this limitation.

Yes, but all these give me more the impression of a "marketing gimmick" than a really useful addition which is also not clearly communicated and might lead to disappointed buyers.

 

[DLS79]

Yes, but all these give me more the impression of a "marketing gimmick" than a really useful addition which is also not clearly communicated and might lead to disappointed buyers.

It's listed in all the marketing materials by Apos and the like!

for example.

 

[Inertiaman]

this is not necessarily true, when you get down to IC level programming you can run into issues that aren't common today in general computing today, i.e. lack of memory.

How is memory saved with the same filter coefficients on both channels?

The same amount of data memory is necessary regardless of the PEQ filter coefficients: there is a separate data pipeline for the L and R channels (as there must be, since they contain different data unless its a mono mix). Similarly, the filter must be independently computed on each channel since they are independent data streams.

Hence the computational load (ie processor cycles) is the same, whether the PEQ coefficients are a/b/c or x/y/z. Forcing L and R to be a/b/c is no fewer compute cycles than L being a/b/c and R being x/y/z.

FWIW, I have near zero experience with "general computing" programming, but I do have a DSP background and spent a few hours in the late 80's and early 90's writing assembly language code on DSPs.

 

[thewas]

It's listed in all the marketing materials by Apos and the like!

As a small * remark but anyway my main gripe is rather its limitations which make it more a "gimmick" than a really useful feature, at least for me.

 

[DLS79]

How is memory saved with the same filter coefficients on both channels?

Two sets, of coefficients, require twice as much memory as one set.

 

[thewas]

Two sets, of coefficients, require twice as much memory as one set.

For typical room correction usage usually with up to 5 filters per channel someone get good results.

 

[Inertiaman]

Two sets, of coefficients, require twice as much memory as one set.

Its unlikely the coefficients are stored in memory during processing. They would typically be in register locations with direct access to the MAC unit.

But even if they *did* share coefficient storage in memory, we're talking about 10's of bytes. Not GB. Not MB. Not even KB. Tiny fractions of KB. No chips are that memory bound these days.

My best guess is that the PEQ implementation is a dedicated semi-hardwired unit in the chip, so Topping has little/no choice in the matter. Or, conceivably, if a PEQ implementation was register-limited and designed to sustain 192khz sample rates for a single channel, then if you used interleaved L/R data pipelines at 96khz each through that same filter, you could support two channels, but only if they used the same coefficients. In that case, its still a little sad, since a few more registers in the implementation (to support A/B coefficients) would be insignificant to die area or clock speed.

Whatever, I didn't mean to take anyone down a tangent here, I was just saying its kinda sad to lose independent L/R filters when doing so would require insignificant silicon/speed trade-offs IF it were part of the original chip design objective.

 

[DLS79]

Whatever, I didn't mean to take anyone down a tangent here, I was just saying its kinda sad to lose independent L/R filters when doing so would require insignificant silicon/speed trade-offs IF it were part of the original chip design objective.

It doesn't bother me at all, if anything it helps others understand the limitations of this DAC.


If this helps peoples curiosity.

https://www.xmos.com/download/XU316-1024-QF60A-xcore_ai-Datasheet(26).pdf

Memory - Each xCORE Tile integrates a bank of SRAM for instructions and data, and a block of one-time programmable (OTP) memory that can be configured for system wide security features. A memory buffer can be used to implement software defined memory.

10.1 SRAM Each xCORE Tile integrates a single 512KB SRAM bank for both instructions and data. All internal memory is 256 bits wide, and instructions are either 16-bit or 32-bit. Byte (8-bit), half-word (16-bit), word (32-bit), double word (64-bit) and vector (256-bit) accesses are supported and are executed within one tile clock cycle.

 

[Sokel]

As I was the first to suggest that the EQ function seems to be in XMOS chip (it was a guess,no solid data) please take it with a grain of salt.
It can very well be somewhere else.
My guess was because of the cost,USB only limitation,etc.
Maybe we should make sure is there.

 

[Inertiaman]

If this helps peoples curiosity.

https://www.xmos.com/download/XU316-1024-QF60A-xcore_ai-Datasheet(26).pdf

That's helpful. Given the architectural descriptions in the datasheet, I'm even more convinced that the lack of support for independent L/R filter parameters here is almost certainly a consequence of it being an oversight during initial product definition, and not any meaningful hardware constraints.

 

[Inertiaman]

As I was the first to suggest that the EQ function seems to be in XMOS chip (it was a guess,no solid data) please take it with a grain of salt.
It can very well be somewhere else.
My guess was because of the cost,USB only limitation,etc.
Maybe we should make sure is there.

I think its an excellent guess. It explains a lot of things, and there doesn't seem to be a good competing hypothesis.

 

[amirm]

@amirm, do you know if this new device shares a similar behavior?

It is spec'ed to support up to 192 khz and indeed, I tested that and it works fine.

 

[amirm]

I don't understand -- for this product or others which have done the same -- why PEQ is implemented in a way that forces the same filter on L and R channels.

As I have mentioned, their target has been headphones and there, you apply EQ to both channels. This being a tiny DAC, has less application to home use in their mind.

 

[amirm]

Is this “true” (uncorrelated) noise? If the D50-III digital filters are processed/calculated in the Xmos XU316 chip, what would create random noise?

My guess is that the much higher level of activity on the XMOS IC is causing noise/ground bounce to bleed into the output of the DAC. Having a DAC powered by a USB source may aggravate this. If I were less lazy, I would test it with a separate power supply to see if it goes away.

 

[DLS79]

I think its an excellent guess. It explains a lot of things, and there doesn't seem to be a good competing hypothesis.

Short of a Topping developer/engineer getting himself fired for sharing company IP, I think the best we will be able to is hypothesize.


Edit: The documentation specifically states this.

1.1 Software

Devices are programmed using C, C++ or xC (C with multicore extensions). XMOS provides tested and proven software libraries, which allow you to quickly add interface and processor functionality such as USB, Voice, Ethernet, PWM, graphics driver, and audio EQ to your applications.

 

[raif71]

Imo, the only benefit of XLR over 1/4" TRS is that it is more easily found as a locking connector. It's worth noting locking connectors aren't very common in home audio gear.


An example of locking chassis mount connectors. You will destroy the cable before you can accidently get the connectors apart.
View attachment 364514



Regardless, you aren't going to find XLR support in something the size of a D50. The connector is almost the size of the chassis.

View attachment 364515

Topping d50 III has different dimension from d50s as shown from topping site https://www.toppingaudio.com/product-item/d50-iii . Looks like it is taller than d50s

 

[dguillor]

Great! Now I can properly set the EQ, just like on my old system:

View attachment 364390

That’s a graphic equalizer, not a parametric equalizer, and much less powerful.

 

[DLS79]

View attachment 364581

Topping d50 III has different dimension from d50s as shown from topping site https://www.toppingaudio.com/product-item/d50-iii . Looks like it is taller than d50s

@amirm can you give us a chassis height double check?

 

[raif71]

@amirm can you give us a chassis height double check?

while you're at it, why not check all dimensions

 

[Henreid]

It's worth to mention that EQ is only working with USB input!

Since I own thousands of Compact Discs, I was hoping I could use this Topping DAC as a low-cost headphone equalizer for the digital signal through coax or optical from my CD player, but unfortunately, that isn't possible. Maybe someday...