Mivera
Major Contributor
Link returns a 404 error.
Link shows plenty of eye candy but no explanation for how it might be necessary.
http://jlsounds.com/i2soverusb.html
Link returns a 404 error.
Link shows plenty of eye candy but no explanation for how it might be necessary.
That flip flop is perhaps guaranteeing a cleaner transition between states before being fed to the DAC, but it's not a clocking operation - effectively it's a buffer/filter in its operation.
The only way I can at present think that an extra FF brings anything to the party is if the clock's been sent across an isolation barrier and picked up some jitter in the process. But that's just a band-aid for shoddy implementation, with async the DAC needs the clock sitting right next-door.
There are others here reading besides you - you're apparently misleading them with your claims.
Its great you got a result that you can listen without worrying about the source component, that's the main thing.
Yes, the clock is next to the DAC - but another signal with transitions is that of the data itself, the DIN pin adjacent to the CLK pin. What is the actual level of "jitter", noise on that DIN waveform, how clean is it? Yes, should mean very little, but depending on the chip it may be significant - so, an option is to do some grooming of the quality of that signal line - may help, or may not ...The only way I can at present think that an extra FF brings anything to the party is if the clock's been sent across an isolation barrier and picked up some jitter in the process. But that's just a band-aid for shoddy implementation, with async the DAC needs the clock sitting right next-door.
I use reclocking as the isolation barrier adds time distortion to the transfer from one zone to another. It is documented in the datasheets. Time distortion in the way that the delay from level shift on one side to another is not uniform. The DAC in PCM mode uses the master clock for internal digital filtering. DSD jumps over this part, so it needs to be clean from the beginning before entering the DAC
Depends on how you look at it.
Analog devices solution is made up of two coils that has a attached logic that detects changes in the field because the coils has no static state. So this logic try to predict when to switch. The will switch in 100% of all cases, but there can be a small delay.
Then we have jitter introduced in mismatched transmission lines,
Then we have noise on the supply voltage messing up the the transition level.
The noise on the supply voltage is due to currents flowing when changing state or level. Best way to deal with this is ceramics capacitors dealing with DC to GHz not audiophile caps
And based on the pictures it really output 12 Volts!!Amir,
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I am actually created a test setup for power supplies! Will test the ones I have now before testing others.Amir,
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http://www.computeraudiophile.com/f...mponents/paul-hynes-sr5-12v-28885/#post552111