Rockchip64 SoCs implement multiple I2S interfaces, some 8ch (TDM and/or multiple IO lines). Check e.g. https://wiki.radxa.com/RockpiS/hardware/gpio#Hardware_V13
Using the I2S output in slave mode requires no jitter cleaning as the clocks are by the DAC. Of course running RPi I2S in master mode and using RPi-generated jittery clock (like most RPi audio hats do) is extremely suboptimal https://www.diyaudio.com/community/threads/avoiding-rpi-master-i2s-fractional-jitter.376583/But I have read a little about IanCanadas products over at https://github.com/iancanada/DocumentDownload. As it seems to me, those are probably good examples on products that will gladly take on the jitterfree quality audio transport towards the DACs in the end of the chain, as delivered from a Soc multichannel i2s (or the MiniDSP USB Streamer's) output. Interesting ambition, at least.