Reference ABX hardware design and implementation

[KSTR]

OPA828 unfortunately fails, but OPA2828 in parallel with e.g. Rfb of 100R is noteworthy.

Well, paralleling OPA2828 would require each one having its own private feedback network which is not feasible with the planned gain setting strategy. It would require doubling up everything.

 

[Cascode]

Please don't shoot me for all the obvious issues with this schematic, I hope it is enough to help with getting to grips with the overall analog board:

View attachment 550907

Perhaps, consider specifying a low temperature coefficient resistor for Rfb and paralleling it? With 12 dB gain, 180R will have to dissipate 50 mW. Taking a UMB 0207 from Vishay as example, this equals a 1.3 K difference. Even with 5 ppm / K this might result in measurable low frequency distortion, altough I have no prior experience with this and A-weighting helps massively.

https://www.vishay.com/docs/28715/uma0204-umb0207.pdf (Vishay datasheet)

 

[Cascode]

Well, paralleling OPA2828 would require each one having its own private feedback network which is not feasible with the planned gain setting strategy. It would require doubling up everything.

That is of course true, my bad Adjusted Post 240.
Nonetheless, using a buffer seems like a wortwhile investment, and also a single OPA828 inherits most merits

 

[KSTR]

Personally, I think we shouldn't be overly obsessed with absolutely lowest possible distortion and lowest noise but conservative de-rating of course is is OK. Like using several paralleled resistors to keep dissipation well below critical levels.

But I really think using a buffer in the loop would be a good design choice to remove any load-induced distortion, basically having the master opamp running in class-A.
As mentioned, OPA828 would be my choice as there hardly is any better opamp for non-inverting duty wrt to balanced compromises, overall.
While the noise is high (in relative terms) I think we would still have a hard time to find a DAC with lower output-referred noise.

On top of this, as long as the monitoring means is not specified (or even part of this device) chances are high that the amp used will contribute enough own noise and distortion to make a full-blown optimization wrt HD and noise (with much increased complexity and cost) of the ABX amp somewhat pointless. There are other, more important points to consider for a rugged, bullet-proof device.

 

[Cascode]

I just saw that @Armand already measured the THD under heavy load of the feedback resistor in Post 192. Seems to be doable with conservative derating, as you suggested.

Bufffer: + supports low impedance feedback network that reduces common mode distortion and makes output linearity constant, irrespective of external load.

I think both options have their merits. OPA1612 tends to scale with DUT performance, since a well-measuring DUT typically has a low output impedance and should be hardly affected by a 10k load. It is the only option that could meet the target spec from the thread start. On the other, an OPA828 comes closer to an ideal black box, which irrespective of DUT produces the same result. It will also be hard to find a DUT that produces <1.5 Vrms output, yet exceeds -130 dBA.

I guess it comes down to the target specifications When going for the OPA828, the noise target could e.g. be changed to input referred noise.

 

[mcdn]

@Cascode @KSTR great input. I had already reached the conclusion that the 130dB THD+N was probably only going to be achievable in the 0-6dB gain range, if at all. That's not terrible, +6dB allows matching a 2V nominal and 4V nominal DUT, and if we have to relax the stated performance after measurement that's also not the worst thing. I still think hitting -130dB at optimal conditions (low Rsource, low gain, 4Vrms signal) is in range.

I have switched to the OPA2211 for its better DC offset, temp stability, thermal resistance, and better (on paper) performance into lower impedance loads. It costs a few dollars more but we only have one of them, and it gives us margin. I'm still not entirely convinced a buffer is worth the added complexity. Given the large number of mux taps and other complications on the board I'm very wary of making solid performance predictions based on datasheets or general field use in other products, so I'd prefer to see how the OPA2211 works into a nominal 10k load first.

For Rfb and power, the currently selected device is now 680R based on earlier input from @Cascode (https://www.audiosciencereview.com/...-design-and-implementation.72589/post-2657084) Exact part https://jlcpcb.com/partdetail/YAGEO-RT1206BRD07680RL/C870848

@Armand I have taken your advice and gone with chip thin films instead of MELFs. Availability and cost is better, as is repairability. @KSTR where these are used in ESD-sensitive positions they are pulse qualified.

 

[KSTR]

so I'd prefer to see how the OPA2211 works into a nominal 10k load first.

The expected output load is almost irrelevant (unless we're talking Cosmoc ADC levels of impedance), the feedback network load is dominant.
The DC offset advantage will not materialize as bias/offset current induced errors will dominate, given the non-equal node impedances. This also makes LF current noise much worse (the numbers and graphs are for equal node impedances so that the bias current cancelling is actually effective). AFAIK the 211 and 1611 dies are the same, only that 211 is selected for low offset, the slightly different other specs come from different testing methods (speed is everything in chip-level production characterization).

I'd use singles, so OPA828, OPA1611 (or any other typical single) could be fitted as both are available in SO-8. There is no common package for the dual versions.
Also, singles allow for cloning a channel layout more easily.
And I'd make the in-the-loop buffer optional.
In general it is always good to have lots of patching options (with solder jumpers), testpoints etc so that one really might get away with a single try.
For example I'd add provisions for offset trim of singles like AD797 and for the optional compensation.
I'd probably even add provision for basic standalone operation.

I can only repeat that I find it really a bummer that this is a weird schematic-less design approach (the one posted, while better than nothing, isn't that useful), in my view that really complicates any attempts of proper peer review (if wanted, that is), let alone true collaboration, it makes the project closed-source actually, and almost un-maintainable, almost fully depending on AI. It makes any collaborative professional routing attempt quite harder as well, unnecessarily complicated.

 

[mcdn]

I can only repeat that I find it really a bummer that this is a weird schematic-less design approach (the one posted, while better than nothing, isn't that useful), in my view that really complicates any attempts of proper peer review (if wanted, that is), let alone true collaboration, it makes the project closed-source actually, and almost un-maintainable, almost fully depending on AI. It makes any collaborative professional routing attempt quite harder as well, unnecessarily complicated.

I totally understand where you're coming from. I'm also frustrated by the inability to get a true visual representation easily, but it's a hard problem - on one hand we (I) need a format AI can work with, and for now that's code, not diagrams. On the other hand gaps/problems arise that would be blindingly obvious given a good schematic. There are a lot of people working on the problem of roundtripping net lists and readable schematics, but so far nobody's solved it. AI's are just terrible at anything visual that needs accuracy.

The whole board schematic was maybe a bit too much to bite off. Here are two that are narrower and more design focused, showing the path from one RCA input to the opamp input, and from one opamp input to an RCA output. They both reflect the conversation to date, though the output protection shunts got omitted.

 

[Cascode]

@Cascode @KSTR great input. I had already reached the conclusion that the 130dB THD+N was probably only going to be achievable in the 0-6dB gain range, if at all. That's not terrible, +6dB allows matching a 2V nominal and 4V nominal DUT, and if we have to relax the stated performance after measurement that's also not the worst thing. I still think hitting -130dB at optimal conditions (low Rsource, low gain, 4Vrms signal) is in range.

Okidoki and completely understandable! You are the product owner. I think your decision is a reasonable compromise For transparency, consider reflecting this change in the target specs from post 1. For example:

THD: < -130 dBA (no “+N”)
Noise: < 2 nV/√Hz input referred

I calculate ~1.6 nV/√Hz at 0 dB, i.e. with highest current noise from feedback network.

 

[mcdn]

Here's the power architecture.

 

[mcdn]

Okidoki and completely understandable! You are the product owner. I think your decision is a reasonable compromise For transparency, consider reflecting this change in the target specs from post 1. For example:

THD: < -130 dBA (no “+N”)
Noise: < 2 nV/√Hz input referred

I calculate ~1.6 nV/√Hz at 0 dB, i.e. with highest current noise from feedback network.

A target is a target, not a commitment! I'll measure it and we'll see how close we get.

 

[mcdn]

A target is a target, not a commitment! I'll measure it and we'll see how close we get.

Although it's true, that post could do with an update given how far things have moved on.

 

[KSTR]

Kicad source files are all ASCII so one could use that for checking whatever is not covered by built-in ERC and DRC (with custom rules and all).
I have not understood why you need any AI to create a circuit in the first place (not talking about helpers like calculating gain resistor values etc).

 

[mcdn]

And here's the important bit, calibration. This is the heart of why this device is a step change from before. I've attached the schematic and also the design rationale. Whether the absolute THD+N is -120 or -130, being able to precisely and repeatedly match levels for both line and speaker level signals is the absolute core of the device.

 

[mcdn]

Kicad source files are all ASCII so one could use that for checking whatever is not covered by built-in ERC and DRC (with custom rules and all).
I have not understood why you need any AI to create a circuit in the first place (not talking about helpers like calculating gain resistor values etc).

If it was my full time job, sure I would fight with footprint selection and checking, pin allocations, sourcing, STEP models, mismatches between datasheets and supplied models, rotation and naming issues between models and assembly, global naming, schematic hierarchies in KiCAD (the horror!), maintaining one project with multiple boards (not even possible in KiCAD).

 

[KSTR]

I'm seeing none of those issues in my daily work. Even multi-board designs can be handled in Kicad with a simple trick. Not as nice as in Altium, however. Kicad 10 allows for zero global naming as they introduced local power symbols. I find hierarchical design nice and elegant and easy to handle.

 

[mcdn]

I'm seeing none of those issues in my daily work.

I think that's my point, for you it's daily work so you overcome all these pain points. Kicad 10 is an improvement for sure. Anyway, we are where we are, and I'll do everything I can to make it possible to continue to get your input. Reach out on DM any time.

 

[SSS]

Line amp, will the level adjustment done of both channels (L,R) done independently?

 

[mcdn]

Line amp, will the level adjustment done of both channels (L,R) done independently?

Independently, about 0.02dB accuracy

 

[PristineSound]

Not sure if the logistics of making physical units of this ABX comparator available for the masses has been hashed out yet.

If not and someone has connections for a US-based manufacturer (trying to avoid tariffs and headache), I am willing to be the point person for US distribution. Meaning, I will front the bill for prototypes and testing units and the manufacturing of, say 30-50 units, depending on interest, minimum order and unit cost and will distribute the units at the cost of the total US paper to production per unit.

I rather not do it, but based on what I am reading, this is just a design and spec doc and individuals need to find a way to get it made, sounds like a royal pain in the booty.

Again, I rather not be the point person and I rather be the guy who just order and pay for my own unit. . .but again, trying to make this easy for everyone interested.