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Never Go Full Gustard: An X20 non-U Adventure (Dual 9038 in a dual 9018 house? Or just a house fire?)

deadwood83

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So, back in my early days of being able to afford better gear, I snagged a newly-released Gustard X20 (not the X20u with the USB card). THis unit served me faithfully until about 2019, when I decided that the DX7 Pro was good enough to ditch the HP amp (many) / DAC stack and convert to an AIO unit. At that point, the Gustard was put in a closet where it sat until a few months ago.

I was dead-set on improving a cheap 2x 9038Q2M DAC which measured just above 90dB TD+N. At one point, after frying the USB eeprom with a bad flash I broke out the Gustard and its accompanying Singxer SU-1 so I could use the Singxer to feed LVDS I2S into the cheapie. Once I had taken the cheap DAC from an okayish 91dB TD+N all the way to 108dB TD+N I was fairly satisfied. 108 may sound a little low but we are all spoiled. Everything I measure shows worse results than here so I am guessing it performs quite similarly to a Topping D10 Balanced.

Anyway, since the Gustard was sitting there on the floor I thought "why not?...." and that is how this all began. I failed to capture very detailed measurements because the numbers were disappointing enough I figured it would just go back into the closet.

1kHz FFT:
gustardX201khz.JPG


Multitone 32:
Gustard_Multitone.jpg


Look at those harmonics. Look at that third harmonic! That skirt! Yikes! Well, I say yikes, but this is a 2014 product. $600-ish 2014 USD would get you a DAC with ~100-105dB TD+N (again, my measurements always show 6-8dB worse than Amir's) with XLR, RCA, 32-bit volume control, LVDS I2S, AES, Optical, RCA SPDIF and even a BNS SPDIF connection. All in a sturdy brushed aluminum housing holding two rather large toroids complete with deparate PCBs for each part of the functionality, etcetera etcetera. But times have changed. Times have changed a lot.

The advent of cheaper silicon processes allowed more computing power to be shoved into chips. Process nodes shrank, LDO's got quieter, and that MCU which previously served as a display host and to set 1-8 registers is now responsible for 60+. There's onboard reclocking which is actually usable, and setting a precise oscillator right next to the DAC is now the de-facto standard. Onboard CLPDs for kitter control are now common right before the DAC chips in dual systems. Gustard, however, has always taken things a little too far. They tried to share a 100MHz clock from the digital board which was used to click the first (yes, there are two) CLPD which re-transmits all the input signals. This clock is shared across a coax cable and towers from the input board to the DAC board. It worked fine, and I think it is about the best execution of a terrible idea that can be had. But the execution still does not help the fact that the idea is terrible.

The Head-Fi thread has some great photos and has an occasional technical post but is mostly about cotton insulated OFC wires, stickers to go on top of capacitors, 'special' cotton wires for coax, etc. Nothing against those guys. They did properly identify some actual deficiencies in implementation, but then got absorbed in fixes involving a lot of marketing with nothing but subjective listening 'experiences' to guide them. Their heart is in the right place, but they may not have much interest in physics and math.

Output is handled in three stages:
- I/V happens across four AD4898-1 opamps. Feedback and filter components are all 1206 sized SMDs of proper selection. Power conditioning is handled by WIMA film capacitors on each rail.
- Differential matching is handled by a following OPA1632, one per channel. One side is dedicated to the 'hot' and the other to the 'cold'. The feedback network sets this to 2/3rd gain. (2390-Ohm input path, 1590-Ohm feedback path)
- Finally there is a discrete buffer. I have completely traced out one side of one channel. They are identical in construction for all four buffer circuits. If somebody wants to SPICE the circuit, I would be more than happy to see what it looks like. I am very curious if this buffer network could be better handled by a single opamp per 'layout' (four total opamps).

Here is one photo shamelessly taken from that same thread to illustrate the guts. I'm not sure if you can buy something with that many discrete components for the same number of inflation-adjusted dollars.
8824608.jpg


Performance aside, the symmetry and layout are very visually appealing. It's a good looking unit, even if I have very mixed feelings about a discrete buffer stage. I personally believe that a well-executed opamp stack will outperform it, but the X26Pro, the X16, the X18 all present compelling arguments. ESS has been very generous in making the 9018, 9028, and 9038 all identical in pinout (for the pro versions).

Anyway, the question I find myself asking, well.... myself; is this: Why spend the effort and capital to try and put two 9038Pros in this old, heavy, power-inefficient dinosaur?

The answer is simple and consists of two parts.
1. Why not?
2. Because I was offered two virgin 9038Pros for $30 USD. In late 2022.
3. (Bonus) Because deep down there might be a little masochism in me.

So let's start off with the challenges. First off, this is a terrible idea. Not just a terrible idea but an exclusively terrible idea. Maybe it is alright if you are a Buffalo III DAC owner but for anybody with a less modular PCB it's really just.... not worth it.

- 100dB TD+N is honestly going to be audibly transparent for the vast majority of real life situations.

- The 9038 is a HUNGRY chip. Each chip realistically needs bare minimum 300mA clean for AVCC and another 300mA for VDD. In dual mono, the VDD requirement goes from 1.2V to 1.3V just to allow more wattage. The ~130mA current requirement in the datasheet is with a 40MHz crystal and a 48kHz sample rate. Jump to 100MHz clock and 384kHz sample rate and you really want 500mA for each chip. From a power perspective, the 9038Pro was a massive step backward from the 9028Pro. In DimDim's excellent post about 9028Pro power draw we get to see the power requirement scaling. He is driving with a 100MHz oscillator. At 352.8kHz he was drawing 200mA on the core compared to the rated.... 82mA. Considering the 9038 has a good 50% higher draw we could easily see 300-350mA per chip at 384kHz, let alone 768kHz or DSD512+.

- Heat. Ever seen a naked 9038Pro without a heatsink run anywhere near full potential? It has an epad, which the 9018 never had, but it also always seems to sport a heatsink. The X20 has no ability to host any sort of epad nor real bottom dissipation. I have an idea here which I can discuss later.

- Output current. The 9038 has a ton of it. It has more output current than any SOIC opamp wants once you parallel four channels per opamp. It needs to take ~66-70mA in the I/V stage. Using traditional bipolar opamps is almost impossible without crippling the chip's capabilities. I believe this is why Gustard used a 'hybrid' opamp/discrete I/V on the dual 9038Pro X26Pro.


Let's look at the boards and strategize.

On the digital side I have removed the PCIE slot so I can wire USB I2S directly to the board. More importantly than that, I traced back the I2C pins to the onboard STM32. DimDim has an Arduino controller for the 90X8Pro based on a Due. I'm hoping with STMDuino I can port it over for the onboard STM32F407 chip controlling the Gustard display (512kb memory) and employ a J-link to flash it. I need to do a little hell of a lot more research and work there. Firmware is where many of my projects get stuck. If anybody wants to help (out of curiosity/solidarity, or some other non-monetary motive) decompile a Gustard dump so we can modify for the register controls; or wishes to help port DimDim's Arduino code to STM34F407 I would offer my heartfelt gratitude. I can disassemble the front panel and reverse engineer the physical circuitry.

Supplying the beasts. Let's take stock of what we have. At the bottom of the photo is a set of test points. Unmarked is audio ground. The X20 does not utilize chassis ground as audio ground on the DAC board. There is no continuity between the mounting hole plates and the ground test point. -V and +V are the 15V rails rectified from the primary 50VA toroid. The digital board uses a separate 9V toroid. '5.0' is the basic digital board carrier voltage distributed to all the various LDOs. It can be checked next. Just to the right of that is 'O3.3' which is derived from the two LDOs next to the crystal socket. To the right of that point is 'D1.2' which is our digital core voltage, and next to that is 'R3.3" which is the LDO handling the right channel's AVCC. There is a corresponding 'D1.2' and 'L3.3' lext to the left channel's DAC chip. While AVCC is handled on a per-chip basis, the 1.2VDD is shared and both test points are directly coupled.

1669479947996.png

Starting from the front where the power comes in we set a rectumfried +15V and -15V from the toroid which is then passed at 30V through an LM2956. Each 15V leg is preserved for opamp rail usage. I tried to find LDOs in similar lead count with higher current and/or lower noise but it looks like that might be the only thing which will fit there. The LM2596 gives us the 5V and corresponds with test point '5.0.' The 5V is what is shared between the 3V3 LDOs and the 1V2 LDO. We have a significant +/- 15V budget to waste on opamp power and discrete buffer components but realistically about 12 clean watts or less to power both 9038Pros, the CPLD, and oscillator. IF we can keep each 9038 under 4-5W draw then everything should be gravy.

Coming off the 5V we see two SOT-23 LDOs to the right. The top is for the CPLD and features less filtering. The bottom is our 1.2V VDD for both DAC chips. For a dual mono 9038, this will need to be bumped to 1.3V. Remember how I Said the power requirements were kind of batty? Let's compare generations.

1669481239430.png


The 9028Pro is just a 9018s with updated digital core. We can see the input efficiency improvement with less than half power usage in the input O/S filter, jitter reduction circuitry, and DPLL/ channel mapping sections with increasing complexity each generation. Perhaps there was a process node shrink to a smaller die transistor size. The actual conversion cores though are a whole different beast. They hunger. The cores stalk the confines of their silicon home; looking for flowing electrons. They wait, patiently, for their prey to become available in great number. Finally they strike, quickly and viciously, howling and reveling in great charge lust; their writhing and machinations elevating temperatures to a level threatening their own existence.

I could not find the make/model of the 1.2V regulator. The two dots are very similar to Richtek (usually noisy) but the 6-character code in a non-matrix laser marking indicates maybe Analog, Onsemi, or TI?

PLAN: LT3045-1A0G Ultra Low Noise LDO Voltage Regulator (1A) or TWO T
wisted Pear Trident 1.3V (600mA per) (but that thing is massive and costly).

1669483773803.png


The 3V3 is provided by one LT1763 per chip. The LT1763 was never a bad chip, but the regs available today are far superior. It is specced at 20uV/rtHz which is pretty poor by the standards of the TPS7AXX series and LT3045. These have a WIMA MKP on the feed side and a SILMIC II on the load side. Some people complain about the SILMIC II in a power application. I honestly don;t think it would make much difference. In fact, a purpose-built power supply cap might be better than some fancy-schmantzy audio bull. From ELNA's prodyuct description: "Elna RFS (SILMIC II) Miniature High-Grade Capacitors for Audio use silk fibers for foil separation instead of paper. By using silk fibers and the fiber's pliability, the RFS (SILMIC II) Series offer high-grade superior acoustic sound for audio design. The RFS Capacitors can be used to relieve the music's harmonic vibration, increase the purity of the sound at high frequency, decrease muddy sound at the middle frequency, and increase high energy bass sound at low frequency."

Yeah.... that is all definitely happening from a power filtering electrolytic..... :facepalm:

Anyway, since I will likely be ordering from LDOVR (unless anybody else has a great regulator source with measured results) I can say that for now...
PLAN: Replace with 3.3v LT3045-78XXG Ultra Low Noise LDO Voltage Regulator.

The oscillator LDO is also probably equally noisy. For initial testing, I will be using the 100MHz oscillator stolen from an old SMSL M8. The future holds a different oscillator. Perhaps a Crystek CCPD-575X (+-20ppm / -90dBc/Hz ), or maybe SiTime 5359 (+-0.05ppm / -89dBc/Hz). I think these may pair nicely with a Ti TPS7A2033, as the PSRR vs Frequency and IOut graphs look promising, even if it has 7uVrms noise.

Cooling Tempers.

With 1.2/3V and 3.3V loosely addressed, we can talk about heat. There are not many options here. 9028 and 9038 can use epad to help address the issue, but that is a no-go here. Since the board was designed for 9018s with no epad, we can see a myriad of traces flowing under and around the chips on the bottom layer.

1669485188929.png

We do see a very thorough tie-in of grounding planes.

PLAN: I am thinking I might be able to mill a chunk of aluminum which is located by the chassis stand-offs. That piece would fill the gap between the chassis bottom plate (with some thermal goop) and the bottom of the PCB with two raised squares beneath each chip. Atop each of these squares could sit a non-conductive thermal pad. This would allow heat to transfer through the bottom of the chips into the huge thermal mass of the aluminum block and then into the casement itself. Some simple thermal adhesive sinks could ride on top of each device, or I could mill a larger sink for reliefs on the bottom for passive components and affix it with some thermal adhesive tape. This would give more thermal mass and more dissipation area at the cost of difficult removal in the future.



Now we can move on past the DAC chips themselves.

The Output.

The 9038 has a huge amount of current output. Parallel four channels per XLR hot/cold and you have a current supply that no SOIC-packaged opamp can handle and still produce decent TD+N when four channels are aparalleled. Other manufacturers have worked around this with hybrid I/V stages, multiple OPA1612's handling two channels each, and various other methods. Since I am working with a prebuilt PCB (and the wrong one for the real job) these were options which were unavailable to me.

Enter OPA1622. Wow! What a beast. 145mA current handling capability (even assuming that is for 2x opamps that is still 70+mA per opamp) with a THD and noise only bested by the OPA1611 and OPA1612. The AD4898 and AD797 both edge it out but nothing even comes close to this balance of distortion, noise, and capability.

But... That layout. This is a dual opamp. The Gustard is set up for single opamps. This requires ground. The gustard has no ground pin on the original opamps. THe Gustard uses a SOIC-8 package. This is a VQFN. I/Os are nowhere close to the right size, shape, or location. What to do....
This is what we are working with:
1669488554834.png


This is where we want to be:
1669488628455.png



So I spun up EasyEDA and KiCAD. I was reminded why I do not use KiCAD when I tried to dynamically adjust trace paths and find something simple like an 0603 footprint. This is what I wound up with.

1669488742051.png


No orthogonal trace crossings. Layout only somewhat compromised on the +VS line. Feedback in and signal out will couple directly to the 1206 resistor next to the original opamp pads so as to try and keep feedback loop impedance low. Castellated holes with some wiggle room will secure the adapter board to the original pads. The signal ground plane exists right next to the pad two pins away from +VS. I can scrape away a tiny bit of solder mask and turn that NC into a GND. TI says that +VS can tie EN high. Total supply voltage is 30V and the part is rated for 36V. Ordered in 2Oz copper because they might get warm. Placed pad top and bottom which are tied to the OPA1622 pad. TI says to bring this to -VS. This allowed a sneaky bottom side entrance for the -VS line which simplified routing. I have never used a stencil before, but I ordered one this time. That entire PCB is 5.9mm wide. With a 560-Ohm feedback, the 9018's 15mA of current creates a 5.6Vpp signal. Since the 9038 will have ~66mA, the feedback must change. Looking at OPA1622 datasheet, we see the sweet spot is about 4-5Vrms:

1669493364162.png


These measurements are max 2k-Ohm load. The OPA1632 will present a far higher load so the figures might scale a little better; but the OPA1622 has a max Vout of 14Vpp. If we shoot for 4Vrms that gives us 11.315Vpp. If we call it 171-Ohms then we get 11.286Vpp and 3.990Vrms. Multiply by two because each OPA1622 is only half of the OPA1632 input, pass that through the OPA1632's 2/3rds gain and get somewhere around 5.32Vrms fully differential output. This aligns very very very nicely with the OPA1632's lowest noise point.

1669494131345.png



The 2nd stage I think can remain as-is. The 2nd stage will be difficult to improve. the OPA1632 has a TD+N of -132dB. I doubt those tightly coupled resistors and capacitors combined with that particular opamp will warrant any changes. Swapping to the 9038Pro might actually improve performance of the 2nd stage.
1669489654669.png



Now.... the output buffer. Oh my. This was both somewhat fun and very nightmarish to trace out.
IMG_20221125_083030000.jpg.png

Everything here is rated for 25V+ so 3.2Vrms is not going to hurt it. The OPA1632 should see about a 5k differential load (measuring from cap to cap) which just puts it in its linear range. Specs show the as-delivered unit has a 4.6Vrms output on XLR. We know that the as-delivered I/V provides 8.4Vpp (560 ohms * 15mA). This is cut to 5.6Vpp (one leg) at the OPA1632 (8.4*2/3). That leaves us with 5.6Vpp for one side of the XLR. If we look at Vrms only for the hot, it should be 4.6Vrms/2 (hot and cold are out of phase, creating 2x differential from zero bias point) = 2.3Vrms = 6.506Vpp. 5.6Vpp = 1.98Vrms. So the buffer must be providing 1.1617x gain (6.506Vpp/5.6Vpp).

Ergo, if we feed 11.315Vpp from the I/V we will see 5.32Vrms full differential across the OPA1632. This would be 7.543Vpp per leg/buffer. Multiply that by the buffer gain 1.1617 and we have 8.7627Vpp per side of the XLR for a total output of 6.2Vrms. I believe the Gustard A18 had 6Vrms output, as did the X20Pro (ES9028Pro x2).

Again I must ask, why do I want to do this? I don't really know. But if I can get measurements as good or better than the 9018 after my butchering, I will consider it a success. Who knows, maybe I can even use those harmonic adjustment registers to cheat a bit.

Anyway, if you want to watch a disaster... stay tuned.
 
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deadwood83

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Huh things are kicking off faster than I expected.
LDOVR regulators ordered. Got 2x 500mA 0.4uVrms units at 3.3V and one 1A dual unit at 1.3V. Space will be a bit tight. Hoping I can 'make' some copper wires to place the 3.3v units so that they can sink to the chassis. I think the 1.3V unit may require an onboard heatsink. I might have some pi heatsinks sitting around I can repurpose.

Mouser order placed for some bits:
1669728605311.png

Since I hit one of the WIMA caps with my soldering iron I figured I may as well replace the lot with 5% components. The cost difference with 5% vs 20% was a couple pennies each. I can use the rest in other projects. Seems nice to have extra 0.1uF films laying around.

I went for 169-Ohm .25W 1206 resistors for the feedback. THeoretically more current noise than a higher R value but the alternative would be completely replacing the I/V with a really massive board hack or having an output which is a bit too hot to use for most things without then re-adding balanced attentuation. At least this way I Can go back to the ad4989's and 9018s. Plus @pma seems happy with the OPA1622's he has tested. I guess I can always use the 560's Gustard put in and try and integrate a pi-pad attenuator on the XLR outputs and an L-pad on the RCAs. Gustard even provides pads I can re-purpose.

IMG_20221129_063908.jpg


The 575X has a higher noise floor than the 950X by about 5dB at max, but its 10Hz -1kHz is lower noise than the 950X by ~the same. It will be fed by an NCP163 LDO. Partly because the TPS7A20 was OOS, partly because it and the TPS7A20 have nearly identical PSRR at 150kHz which is the operating point of the LM2596. THe 575X is rated for 80mA current operating point which should be fine.

Since I will be playing with clocks, I also grabbed a DIP-14 socket with integrated VCC cap. Apparently the DAC chips are sitting in my mailbox as of yesterday. PCBWay already shipped the opamp boards and stencil. OSHPark estimates fab will finish the panel with my clock adapters on Dec 9.

Turns out Gustard already had some sort of thermal contact on board bottom. I thought there were load-sharing foam pads with anti-static/non-conductive tops. It;s just a thick thermal pad stack. Naturally raw aluminum is more conductive so there's some improvement to be made there (and better pads, which I have some of from PC water cooling), but it also means they made my job easier by pre-marking the locations for me. The case has raised sections beneath the chips so I can locate those on the mill, drill fixing holes, then make the bridge blocks. I also grabbed some <4C/W sinks with adhesive tape for the 9038s.




On the firmware front..... This is the scariest part. I have been pinning out all the connectors and cross-referencing the device type with the pins and STM32MX Cube. SO far it looks roughly like so:
1669730602047.png

This connector interfaces with the digital board and CLPD on it. The digital board's CLPD seems to handle input switching, perhaps lock indication, etc.
1669730696738.png


I'm not entirely sure what sort of signals to look for. PB10 and PB11 are I2C to the chips. The rest can be GPIO, Timers, ADC, UART, USART etc. What the heck kind of signal should a CLPD take? GPIO? PWM? I2C? UART? I think it might be able to take any. Does the CPLD tell the STM32 what the sample rate is, or does it query from registers? Actually, I don't see any registers in the 9018 datasheet to indicate sample rate. I think the CPLD output (this function) determines the displayed sample rate.

1669731811384.png


It seems to reference a pointer to 08003abc which is created by FUN08004540 which looks like:
1669732058458.png


This appears to be a pointer looking here:
1669732181807.png

This is doing my head in. I'll attach the dump in case anybody has skills and wants to help. The MCU is an STM32F407VTG.

The TFT seems to be an IPS LCD using FSMC 16-bit R61529 panel. 320x480. I thought the backlight might be controlled by DAC onboard the STM32. Appears not to be the case. The driver specifies a PWM signal for the brightness. Looking at the driver docs, I see the frequency settings for the MIPI interface.

1669733304051.png


So I guess that means setting up timers in cube. Looks like the LED control FET is on PB4. That corresponds to TIM3_CH1. This can be set to PWM output on internal clock signal. Gotta figure out those CPLD signals. I guess a temp workaround would be to connect I2C from a pi or something and drop the resistors on the LVDS chip. But I don't want that. I want native function.
 

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deadwood83

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Slightly sad news. The firmware goes into an error locking loop if it cannot get valid I2C from the DAC chips. I found this out when I tried to reassemble and verify everything still worked but forgot I had already removed the coax clock tower. (no clock = no I2C).

I have found the chunk in firmware and as I step back through each memory block / function I have been naming them. Whatever iVar1 is, it needs to be 1. I was pleased to see my physical contact tracing from DAC board back across digital and then to MCU board was accurate as it is indeed using the I2C2 peripheral to communicate.

1669865909039.png


It would be far too easy if they had pre-defined matching variables in the flash. Unfortunately, it seems these are generatedat runmine perhaps, because it is just a RAM address outside the flash block.

1669866029581.png


I'd like to try and pull a full 2GB memory dump using openocd but I can no longer seem to recreate the magic happenstance which allowed the SWD connection to mature. I was working from home and the red and blue flashing of the debugger was annoying, so I disconnected it. I might throw the debugger on a pi and then connect it in-situ on the Gustard as I have now soldered a header to the debugging pins.

Interestingly, this MCU is set up with a spot for a USB port, and the pins are wired to the STM32F4's USB_OTG peripheral pins. I can;t help but wonder what Gustard had planned with those. THe header is right next to debug/flash so writing a DFU utility seems more difficult at assembly time than just using the debug pins. THe header is soldered on in a slightly precarious manner because the LDC is right behind the plated through holes.

1669866468375.png


No, that header is not purpose built. I salvaged it off an old crap 3d printer board.

I was rather proud of my clock tower desoldering, which is why I refuse to reinstall the SMA connector. I cannot tempt fate twice.

1669866618089.png


Before slapping the 'Order' button at Mouser I was sorely tempted to get some oscons to replace the SILMIC IIs. THey are power supply caps in a power supply role. Using 'special audio' caps there makes no sense. But then I realized that would lead me down the path of examining and searching every can on the board. There are 12x nichicon UFM caps between the DAC/output buffers and at the darlington transistors which I believe feed the 15V rails. Part of me thinks those should also all be polycaps because low ESR on power rails... but the other part of me says "they are part of the output buffer and tie it to ground, would they technically be in the signal path?" And then I start looking at 100uF film caps and realize that the cheapest Panasonics are still $10 ...with wimas at $15 each. The Nichicons can stay. Plus every single Nichicon UFM 100uF cap seems to be paired with its own wee little .1uF WIMA so who even knows how much they;re actually doing. The wimas are probably bearing 70% of the load. I think they're parallelled.

1669868248717.png



The firmware error condition is a hard do-while loop. Well, a series of them. THis renders the control interface effectively bricked so long as it cannot read I2C, or if it reads I2C it does not expect.

So I got to thinking.... OSHPark is being INCREDIBLY slow. THe PCBWay PCBs I ordered half a week later will be delivered to me a full week before OSHPark even expects to get my boards back from "the fab." which sounds like a 3rd party location. I've always used JLCPCB but decided to give some competition a try.... and because JLC wanted $130 to make 10 OPA1622 boards with castellated PTH on three edges... while I could take advantage of new user coupons from PCBWay. I might be too impatient to order from OSHPark. They are slow as dirt, boards are half as thick (hoping to get 4 flat pieces out of the 10 I ordered), and pricing is pretty similar. Suddenly the extra $20 for DHL shipping from JLCPCB (the real price difference) makes so much sense. 3-5 days to get a whole stack of PCBs made how I want versus 2.5-3 weeks to get a design already shared on OSHPark's website.


So I started to think how I could temporarily install a clock and scope out the comms between digital board and DAC. First I needed a clock. SO I broke out one of my cheap tungsten scribes and well.... started scribing. The donor SMSL M8 uses THICC copper so I had deep reservations about getting it off in one piece by desoldering. This was reinforced as I found multiple ground layers within the 4L SMSL board. Credit where it is due, SMSL makes a tough PCB. WHy yes, I did steal the OPA1612's for my Leaf DAC, and the STM branded 3.3V LDOs were in that until I sourced the very last TPS7A2033's that Mouser had in stock. A couple C0Gs of proper capacitance went into my Chinese Clone DriveRack PA2 improvements (which now measures better than the original unit).


1669867483020.png


These early SMSL boards had an absolutely incredible amount of nasty flux residue. It's definitely no-clean flux because despitre years of use (in the sealed case) it was waxy, but it looks nasty and feels nasty. I was happy that I managed to limit the collateral damage to the re-useable C0G and X7R caps.

After carefully scribing off layer by layer from the bottom of the clock still attached to FR4 board chunk, I had it down to a single copper layer which I could remove with a quick swipe of a soldering iron. The copper they use(d) is CHONKY.

1669867688555.png


So now I have a clock of entirely unknown origin (but the proper speed!) to which I will attempt to attach flying wires and just throw it in with some jumpers soldered to the edges of the PTH so I can continue diagnostics. Gustard's implementation means that the firmware must come first, which is a major ball ache.

1669868015156.png

1669867991709.png



If not for those meddling CLPDs I could just port over DimDim's controller. But of the 20 pins on the controller board ribbon cable, a full 15 go to the CPLD on the digital board. SDA. SCL, VDDx2, and VCC are the others. I wonder if I could ask Gustard for their code. They haven't made the X20 since 2017 but I also expect to be met with silence or be told to pound sand. I'll shoot them an email anyway, just in case they want to surprise me.


Anyway, that's my update. Now I must return to hell firmware stuff.
 
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deadwood83

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Sketchy soldering time!

That fit :cool: Needs some filing.
IMG_20221201_162513.jpg


Crystek clock came in an antistatic bag and nothing else. The opa1622's though....

IMG_20221202_220746.jpg



Board size for reference:
1670044156619.png


Some eyestrain and a lot of bracing my shaky hands..... those are tweezers,
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One more to go, and then we will see if it makes sound.
So the OPA1622s are in on one channel (right) and noise floor is higher by about 20dB.
Oddly, the skirt dips a little at the fundamental frequency.

The relative size of the harmonic peaks are reduced by about 10dB.

Some thoughts:

Perhaps this needs to be driven harder.
Perhaps the film bypass caps are only good for the analog devices opamps. Even an 0603 cap will not fit on these PCBs but I could always put a 1210 next to each power pin and solder the other side to gnd. I know the AD4898's are GOOD, but they can;t be 20dB better than the OPA1622.

Edit: Ah, just realized what might be the thing. In my adapter PCB I left the 2nd opamp floating but powered (shared rails). The dip is probably the skirt forming properly but the floating inputs and output are messing things up. TI has a tech note about proper termination. https://www.ti.com/lit/an/sboa204a/sboa204a.pdf

This is easy enough to do properly. Bridge -IN_B to OUT_B and tie +IN_B to analog ground. I updated the design in case things work out.
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deadwood83

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When you want to make a solder bridge, nothing wants to bridge. And I really want a magnifier working these .15mm distances.

I also thought that reprogramming the CPLD might be simpler than decompiling the firmware. I was wrong. I think. At least, Quartus seems like it would take ages to understand.

So I got the debug running again on a pi and using openOCD I was able to dump RAM and peripheral register memory. This messed up the mapped address table a bit for functions but using the datasheet and register tables in the STM32F40xx reference manual I was able to map out the register settings for GPIO. First draft:

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Luckily, nothing looks too bad. X-ref against the display pinouts and known traced function pins such as I2C matches the registers exactly so I think I am reading them correctly. I guess the quick and dirty would be tracing back calls involving the I2C pins to determine the write and read functions then just hardcode register settings into it. I think I can do that in Ghidra then recompile the bin and flash it back.

There's also something going on with the ADCs which I can see I think ADC1 and ADC3 being initialized and then some common control registers. The datasheet is not very explicit on how to determine that because the pins have alternate functions (AF as above) and alternate modes (which includes ADC) but there is no register combo on the GPIO section which seems to determine alternate modes. Similarly, the ADC register section just controls the peripheral and doesn't seem to mention the routing. Anyway, back to soldering. I only seem to understand things (or get a hint) when I am not staring at them.
 

TimF

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A non sequitur comment totally off the subject but: Six months ago, University of Maryland School of Medicine surgeon-scientists successfully implanted a genetically modified pig heart into a 57-year-old patient with terminal heart disease in a first-of-its-kind surgery. It was considered an early success because the patient lived for two months with a strong functioning heart showing no obvious signs of rejection, according to a new paper published today in the New England Journal of Medicine.
 
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