I think you should do some reading on how CMOS circuits work. And the comparison with a PC CPU is daft because such a CPU runs on mich higher frequencies and never stops working.
I design digital circuits for a living and the IC's and CPUs I use consume in the mA range, even when running at 120 MHz internally, and when put to sleep they consume in the uA range. A CPLD clocked at 49 MHz and outputting samples at less than 500 kHz is asleep 90% of the time, so to speak. The average consumed power is what a power supply delivers, the peaks for swithing levels are delivered by the decoupling capacitors, not by the power supply. The inductance of the DC path from power supply to the CPLD and other IC's would be prohibitive of supplying the switching peaks due to their inductance. The large capacitor banks won't help either, their ESR is still far too high at 50 MHz.
Most of the current drawn by this DAC will be driven into the R2R network and how much that is, depends on the resistor values used. Look at the stated power consumption of that DAC: 20 Watts. That transformer inside has the size of an 80 Watt toroid. Total overkill, just paperwaight to give the unit a "premium" feel.