Introducing DSPi | A powerful, user friendly and open source DSP for less than a cup of coffee

[Weeb Labs]

From Google, please anyone fact check

Reception (ADAT In)

PIO architecture lacks the asynchronous oversampling arrays, Phase-Locked Loops (PLLs), or delay-locked loops (DLLs) necessary to track and lock onto this incoming bit phase dynamically.

data bits will arrive at the Pico 2’s GPIO pin with an unpredictable phase offset relative to the Pico's internal clock cycles.

...

(I asked about the fact that my source device is part of BNC WC global network connecting all DDC and AD/DA converting devices, thinking that would obviate such issues)

No Sub-Clock Tracking: A standard Word Clock line only pulses once per audio frame (e.g., 48 kHz). It does not provide the high-frequency bit-rate clock (e.g., 11.2896 MHz or 12.288 MHz) needed to sample the center of each incoming NRZI bit.The Sampling Risk: Without phase alignment, the Pico 2's PIO sampler risks reading the digital pin exactly when the optical signal is transitioning between a 0 and a 1. This causes massive jitter, bit errors, and audible digital clicks.

...

Reco solutions

Dedicated ADAT Receiver IC (Highly Recommended)Route the output of your FCR6842031R optical jack directly into a dedicated hardware transceiver, such as a Coolaudio V1402 or an ALALES Alesis Semiconductor AL1402

or?

Implement a Tiny External CPLD / FPGAPlace a cheap, low-power CPLD (like a Lattice iCE40) between your FCR6842031R receiver and the Pico 2.The Mechanism: Feed both the BNC Word Clock and the optical data line into the CPLD. Use the CPLD to run a high-speed digital clock-data recovery (CDR) loop to deserialize the ADAT data, then feed it to the Pico 2 over a clean, synchronous SPI or TDM interface.

I'm afraid it's not entirely clear to me as to what the question was that Google is trying to answer.

If Google's answer is in regards to fundamental feasbility of ADAT in/out on the RP2350, then it's incorrect. The PIO doesn't need a PLL in order to lock incoming bit phase. Each ADAT bit occupies about 25 clock ticks, which is perfectly adequate for clock recovery and for the RX to remain centered on the middle of each bit.

 

[Weeb Labs]

Following more than a month of development, I am delighted to announce the final release of DSPi Firmware v1.1.5, along with the corresponding Console for Windows and Console for macOS. Both desktop platforms are at full feature parity.

This release introduces some major optimizations, a few new functions and fixes a few bugs.

Here are the most significant changes:

• RP2350/2040: PEQ and XO filters have received major optimizations which reduces their DSP load by up to 40% (Big thank you to @jrosser!)
• RP2350/2040: Stereo Upmixer now includes an Off mode for the center channel processing, enabling surround channels with untouched L/R
• RP2350/2040: New first-order High Cut and Low Cut PEQ filter types (Thanks again to @jrosser)
• RP2350/2040: Maximum selectable SPDIF inputs have been raised from 3 to 4
• RP2350/2040: IR remote controls in Control Surfaces can now learn up to 16 buttons
• RP2350/2040: New nouns for Loudness Compensation reference SPL and intensity have been added to Control Surfaces
• Console for macOS: All input channel pairs can now be linked
• Console for macOS: Response curve visibility is now controlled via the sidebar pills, removing duplication clutter from beneath the graph
• Console for Windows: Cleanup of the root directory, leaving only the executable; all dependencies are now in a separate folder

This release marks a stable state for v1.1.5 and will soon by followed by a merge of the release/v1.1.5 branch to main on the repository.

We are now about to enter the v1.1.6 beta cycle, which will introduce immense performance increases, new functionality, stability enhancements and long overdue overhauls to core firmware architecture. Here are just a few of the changes roadmapped for v1.1.6:

• Selectable system clocks and core voltages with automated system calibration, enabling performance increases up to 60%
• Major optimizations to core threading, enabling additional compounded performance increases up to 35%
• Automated room correction with comprehensive firmware support that includes a dedicated high-precision filter bank
• Major overhauls of the SPDIF RX/TX and I2S TX state machines, enabling sample-resolution tracking control in conjunction with the next item
• Soft VCXO, enabling far greater output clock tracking precision without the need for a physical voltage controlled crystal oscillator (Big thank you to @slunk!)
• Support for multi-DSPi configurations with epoch sync signalling for phase-locked output across any number of slaved DSPi devices
• DSPi Terminal with support for all major platforms and SBCs

As we move into v1.1.6 and begin implementing more sophistcated architecture while designing official hardware, we may attempt to acquire analyzer equipment such as the QA403.

The usual disclaimer: While great care has been taken to thoroughly test all functionality, some bugs may remain. Should you encounter a bug or unexpected behavior, please don't hesitate to make a report so that it can be squashed! You can do that either here, on GitHub or via the Discord server (many helpful people there).

Finally and as always, DSPi is a not-for-profit open source project funded entirely by donations and out of pocket. If you wish to support the project, you can do that via Ko-fi or Patreon.

 

[jrosser]

What would be the easiest (no skills, no solder) and / or cheapest ways to get 8ch output via 1x ADAT

Compare to USB? AES? Trying to avoid RPi5 HATs, and PCIe (sorry RPi noob here)

ADAT out is a Toslink based optical output just like you would have for S/PDIF, but with an optical transmitter module that is capable of the higher data rate used by ADAT. The spec sheets for a suitable module should say something about it being able to support greater than 12.288Mbit/s. They are typically specified as 15 or 25Mbit modules but it varies between supplier.

This means for a DSPi, the easiest / cheapest way to create an ADAT out is exactly the same as it would be for S/PDIF. Given optical modules that support the required data rate, they take their power and ground from the DSPi and the signal pin connects directly to the DSPi ADAT output pin, it is very simple - just 3 connections to an optical module for ADAT out.

I don't think that there is a no-solder solution, other than wire-wrap.

 

[john61ct]

ADAT out is a Toslink based optical output just like you would have for S/PDIF, but with
...
to create an ADAT out is exactly the same as it would be for S/PDIF. Given optical modules that support the required data rate, they take their power and ground from the DSPi and the signal pin connects directly to the DSPi ADAT output pin, it is very simple - just 3 connections to an optical module for ADAT out.

And input, can easily work with 8ch ADAT input concurrently with 8ch ADAT output?

My Yamaha DA824/DA824 for example with MY8-AT cards.

Getting ADAT to 4x AES3 gets pricey, but maybe convert from S/PDIF Coax RCA

SMSL SU-2 for a pair at a time, or good old E-MU 0404 is a bidirectional USB interface

 

[Jumpybah]

Yes, you can absolutely do this.

I'm trying to connect a Raspberry Pi to the DSPi via i2s.
With the dtoverlay=i2s-dac driver, the Raspberry Pi should be the master.
But the clock lock remains acquiring.
Has anyone tried this configuration?

 

[robca]

I have a bunch of old Yamaha mini YGDAI boards, the MY8-AE version breaks out its 8 channels of balanced AES3 I/O to a standard DB-25 connector.

How hard would it be to figure out if the edge connector or pin headers are standard I²S or 24-bit Left-Justified?

With a logic analyzer (even a super cheap Saleae clone https://www.ebay.com/sch/i.html?_nkw=24MHz+8+Channel+USB+Logic+Analyzer) and Pulseview, rather trivial. Assuming one understands how to use a logic analyzer and protocol decoders, which can be learned rather easily

 

[frobek]

Has anyone tried this configuration?

I tried, but with MCK multiplier set to 256x. My setup was DSPi USB-I2S (master) and second DSPI as I2S slave, connected all I2S signals Data, BCK, MCK and LRCK, works ok.

 

[Weeb Labs]

I'm trying to connect a Raspberry Pi to the DSPi via i2s.
With the dtoverlay=i2s-dac driver, the Raspberry Pi should be the master.
But the clock lock remains acquiring.
Has anyone tried this configuration?

View attachment 549125

Could you share some more details regarding your pin connections between the devices and other configuration on your RPi?

 

[Jumpybah]

Could you share some more details regarding your pin connections between the devices and other configuration on your RPi?

the links are these:

aplay -l
card 0: sndrpirpidac [snd_rpi_rpi_dac], device 0: RPi-DAC HiFi pcm1794a-hifi-0 [RPi-DAC HiFi pcm1794a-hifi-0]
Subdevices: 1/1
Subdevice #0: subdevice #0
....
1: `RPi-DAC HiFi pcm1794a-hifi-0' Analog audio output on device snd_rpi_rpi_dac
-hardware address: hw:0,0 (or hw:sndrpirpidac,0)
-formats: S16_LE, S24_LE
-usb audio class: (n/a)
-streamfile: (n/a)
-character device: /dev/snd/pcmC0D0p
-monitor file: /proc/asound/card0/pcm0p/sub0/hw_params

It works well with a DAC card.
Is a Master Clock required for the DSPi?

 

[Weeb Labs]

the links are these:

View attachment 549225
aplay -l
card 0: sndrpirpidac [snd_rpi_rpi_dac], device 0: RPi-DAC HiFi pcm1794a-hifi-0 [RPi-DAC HiFi pcm1794a-hifi-0]
Subdevices: 1/1
Subdevice #0: subdevice #0
....
1: `RPi-DAC HiFi pcm1794a-hifi-0' Analog audio output on device snd_rpi_rpi_dac
-hardware address: hw:0,0 (or hw:sndrpirpidac,0)
-formats: S16_LE, S24_LE
-usb audio class: (n/a)
-streamfile: (n/a)
-character device: /dev/snd/pcmC0D0p
-monitor file: /proc/asound/card0/pcm0p/sub0/hw_params

It works well with a DAC card.
Is a Master Clock required for the DSPi?

Could you confirm that the RPi is outputting a supported sample rate? 44.1KHz or ideally 48KHz. The Pico doesn't take a master clock.

It's also a good idea to verify that your Pico pin connections are made on the basis of GPIO numbers and not physical pin numbers, as those are different.

 

[Jumpybah]

Could you confirm that the RPi is outputting a supported sample rate? 44.1KHz or ideally 48KHz. The Pico doesn't take a master clock.

It's also a good idea to verify that your Pico pin connections are made on the basis of GPIO numbers and not physical pin numbers, as those are different.

View attachment 549226

The frequency was 48 kHz.
The pins were, obviously, 19, 20, and 2.

 

[Jumpybah]

The frequency was 48 kHz.
The pins were, obviously, 19, 20, and 2.

I sprinkle ashes on my head...
It works!!!
The problem was the DuPont cables that weren't working.
I replaced the cables, but the second ones were also broken.

I really need to get wire-wrapped!!!!

 

[AlbertDigital]

Getting ADAT to 4x AES3 gets pricey, but maybe convert from S/PDIF Coax RCA

Found this on Ali I2S to SPDIF and AES . ADAT in to DSPi. DSPi I2S out to these board(s)?

 

[Mike123]

Dear Weeb Labs, are there any plans to use WiFi on the Pico 2 board? Is it even theoretically possible to turn the Pico 2 into a network player?

​

 

[somebodyelse]

Dear Weeb Labs, are there any plans to use WiFi on the Pico 2 board? Is it even theoretically possible to turn the Pico 2 into a network player?

​

Short answer: no. See this earlier post for details. It should pair nicely with an ESP32 though, both for control and for streaming like squeezelite or AES67 - I'm sure there are others.

 

[Mike123]

Got it, thanks. I was surprised why they even had WiFi on such a weak chip. Well, no, then no .

 

[Jumpybah]

We'll say goodbye with our faces under your feet, absolutely fantastic, without even asking you to stay still, you can move!
(Ref. We can only cry)

How should an i2s master output be configured, with an i2s slave input?
With BCK and LRCLK shared or split?
What would the split clock scheme look like?

 

[GuidoL]

Hi, is there a way within "Control Surfaces" to adjust the filter gain for left and right channels simultaneously—for example, to configure a bass boost ranging from 0 to +3 dB? Also, is it possible to limit the value so that the boost is capped at exactly +3 dB? Thanks!

 

[Weeb Labs]

Hi, is there a way within "Control Surfaces" to adjust the filter gain for left and right channels simultaneously—for example, to configure a bass boost ranging from 0 to +3 dB? Also, is it possible to limit the value so that the boost is capped at exactly +3 dB? Thanks!


View attachment 549417

Hello! I'm afraid this is not possible at present but is one of the upcoming enhancements, along with layer support.

 

[SDX-LV]

changes roadmapped for v1.1.6:

• Selectable system clocks and core voltages with automated system calibration, enabling performance increases up to 60%
• Major optimizations to core threading, enabling additional compounded performance increases up to 35%
• Automated room correction with comprehensive firmware support that includes a dedicated high-precision filter bank
• Major overhauls of the SPDIF RX/TX and I2S TX state machines, enabling sample-resolution tracking control in conjunction with the next item
• Soft VCXO, enabling far greater output clock tracking precision without the need for a physical voltage controlled crystal oscillator (Big thank you to @slunk!)
• Support for multi-DSPi configurations with epoch sync signalling for phase-locked output across any number of slaved DSPi devices
• DSPi Terminal with support for all major platforms and SBCs

As we move into v1.1.6 and begin implementing more sophistcated architecture while designing official hardware, we may attempt to acquire analyzer equipment such as the QA403.

The usual disclaimer: While great care has been taken to thoroughly test all functionality, some bugs may remain. Should you encounter a bug or unexpected behavior, please don't hesitate to make a report so that it can be squashed! You can do that either here, on GitHub or via the Discord server (many helpful people there).

Finally and as always, DSPi is a not-for-profit open source project funded entirely by donations and out of pocket. If you wish to support the project, you can do that via Ko-fi or Patreon.

____Amazing____ v1.1.5 is already a dream come true enabler of so many awesome use-cases - with ADAT in-out . Now with new roadmap I again see several crazy cool features to be excited about, including Room correction (hopefully with manual control and access to a shared pool of extra PEQs).


I wonder if you can explain more about the concept of multi-DSPi? :

• Support for multi-DSPi configurations with epoch sync signaling for phase-locked output across any number of slaved DSPi devices

Is this intended to run multiple DSPi units over USB input like aggregated audio device in MacOS? I am very interested to have 16ch-out @ 24bits, and that is why using a pro audio interface with ADAT outputs towards DSPi seems like the only option at the moment (given limitations of 16bit-8channels over USB for DSPi).

Also looking forward for official hardware - it probably needs to be modular or have many variants to suppport various features like optical input (maybe even AES3 input?) and digital outputs as well as DACs with sufficient Voltage drive (over 2V? and hopefully SINAD of 100+dB).