Hi everyone,
For years I have been curious about what was really inside the Hifiman Supermini from a hardware / audio architecture standpoint.
Unfortunately, the device is built in a way that makes it very hard to disassemble without damaging it (everything appears to be glued), so I decided to approach the problem from a different angle :
firmware reverse engineering.
This was done purely out of curiosity, and I'm sharing my findings here as a technical "info dump" for anyone interested in how the Supermini is actually designed under the hood.
All of this work was done using Ghidra, plus the publicly available datasheets for the relevant chips.
-----------------------------
Reverse engineering is slow but fascinating. In short, Ghidra analyzes a binary firmware image and attempts to reconstruct the structure, producing something readable but initially very abstract. Most functions / labels start as things like :
- FUN_0046D5C
- LAB_0054F80
- var1, var2 etc...
The main work is to identify what each block does and progressively rename/rebuild meaning.
CPU architecture :
First step was identifying the CPU architecture. I bet on ARM, and quickly got usable disassembly output. This immediately confirmed the Supermini firmware is built around an ARM CPU core.
While scanning the firmware, I found references to the following memory-mapped registers :
- 0xE000ED08 -> VTOR (Vector Table Offset Register)
- 0xE000ED0C -> AIRCR (Application Interrupt and Reset Control Register)
These are typical of ARM Cortex-M architecture.
Further analysis revealed multiple functions related to CRU (Clock & Reset Unit) management. This was a strong indicator of a Rockchip platform, since Rockship SoCs typically expose a CRU subsystem.
So at this point, the candidate was :
- Rockchip SoC
- ARM Cortex M
- released somewhere around 2012-2016 (the Supermini was release in 2016)
This already reduces the field dramatically.
Then came the real breakthrough. While analyzing reboot / initialization routines, I found the following string : NanoCRebootFlag
At this point it was basically game over.
This strongly indicates the main chip used inside the Hifiman Supermini is : the Rockchip RK Nano C. A single core Cortex M3 ARM SoC.
Once the SoC was identified, it became much easier to understand the firmware structure.
---------------------
The DAC question :
From an audiophile perspective, the most interesting question is obviously "what DAC does the Supermini actually use?"
Hifiman marketing only mentions a "low power controller chip with a built-in DAC", which is vague. At first, I assumed the Supermini might use the DAC integrated in the RK NanoC, since the chip is theoretically capable of 24-bit / 192 kHz, matching the advertised specs. I also found references in the firmware to something called a "Rock codec", but it didn't lead anywhere meaningful. That was suspicious.
Then I found what appears to be the missing piece of the puzzle. The mention of a Realtek ALC5633 codec (DAC + ADC + processing blocks) inside the Supermini.
Initially I thought this chip was only used for EQ purposes, because the firmware clearly contains a custom EQ configuration. However, the Supermini has no user-accessible EQ.
Then, I understand. Hifiman claimed they tuned the sound to match the HM901 signature. So the EQ in the firmware is very likely part of this tuning strategy.
While continuing analysis, I found a frequency table ranging only from 8 kHz to 48 kHz. That immediately raised suspicion. Why would a device advertised for 192 kHz cap its internal tables at 48 kHz ? I kept digging and found the key evidence.
------------------------------
Initialization Registers :
The real confirmation came from analyzing the hardware initialization sequence for the ALC5633. Two I2C writes were especially interesting.
Register 0x34 > During initialization, register 0x34 is set to 0x0000. This register controls the I2S mode. With all bits cleared, the default configuration applies, including the I2S mode being in "Master mode". This implies the ALC5633 uses its internal PLL for clock generation, rather than relying on an external oscillator (like TCXO).
Immediately after initialization, register 0x38 is set to 0x1000. Meaning all bits are 0 except the bit 12. Accordingly to the ALC5633 datasheet, Bit 12 controls the DAC word length : 0 = 32 bits, 1 = 16 bits. So this force the ALC5633 in 16 bit mode. This is extremely important.
Looking at the Rockship RK NanoC datasheet, its I2S bus is limited to 16 bit / 48 kHz max. And the ALC5633 is explicitly configured to 16 bits mode. So everything aligns perfectly.
But, there's more !
----------------------
DSD 2 PCM conversion :
While investigating the firmware further, I also found multiple functions clearly dedicated to real-time DSD-to-PCM conversion, implemented as a streaming pipeline.
The code performs DSD processing block by block, using a FIR-based approach (with LUT + accumulate stages), which strongly suggests that the Supermini doesn't support native DSD playback at the hardware level. Instead, DSD is decoded and immediately converted into PCM internally.
More importantly, the conversion stage also includes explicit down-quantization to 16 bit, which perfectly matches the previously discovered hardware configuration (RK NanoC I2S limitations + ALC5633 forced into 16 bit mode). In other words, DSD support appears to be entirely software-based : DSD is converted to PCM in software, reduced to 16 bit, then sent over I2S to the Realtek codec for the actual DAC conversion.
-------------------------------
At this point, the complete audio stack becomes clear :
Flac / DSD -> RK NanoC (decode + optional dsd2pcm + downsampling to 16bit/48 kHz) -> I2S -> ALC5633 -> opamp -> Jack
Hifiman's marketing suggests a "low power controller with built-in DAC" and promotes support for 24 bit / 192 kHz and DSD playback. However, firmware analysis strongly indicates that high resolution formats are handled purely at the sofware level. In practice the internal audio pipeline appears to be limited to 16 bit / 48 kHz PCM over I2S feeding a Realtek ALC5633 codec configured in 16 bit mode, with DSD being converted to PCM in realtime before reaching the DAC stage.
For years I have been curious about what was really inside the Hifiman Supermini from a hardware / audio architecture standpoint.
Unfortunately, the device is built in a way that makes it very hard to disassemble without damaging it (everything appears to be glued), so I decided to approach the problem from a different angle :
firmware reverse engineering.
This was done purely out of curiosity, and I'm sharing my findings here as a technical "info dump" for anyone interested in how the Supermini is actually designed under the hood.
All of this work was done using Ghidra, plus the publicly available datasheets for the relevant chips.
-----------------------------
Reverse engineering is slow but fascinating. In short, Ghidra analyzes a binary firmware image and attempts to reconstruct the structure, producing something readable but initially very abstract. Most functions / labels start as things like :
- FUN_0046D5C
- LAB_0054F80
- var1, var2 etc...
The main work is to identify what each block does and progressively rename/rebuild meaning.
CPU architecture :
First step was identifying the CPU architecture. I bet on ARM, and quickly got usable disassembly output. This immediately confirmed the Supermini firmware is built around an ARM CPU core.
While scanning the firmware, I found references to the following memory-mapped registers :
- 0xE000ED08 -> VTOR (Vector Table Offset Register)
- 0xE000ED0C -> AIRCR (Application Interrupt and Reset Control Register)
These are typical of ARM Cortex-M architecture.
Further analysis revealed multiple functions related to CRU (Clock & Reset Unit) management. This was a strong indicator of a Rockchip platform, since Rockship SoCs typically expose a CRU subsystem.
So at this point, the candidate was :
- Rockchip SoC
- ARM Cortex M
- released somewhere around 2012-2016 (the Supermini was release in 2016)
This already reduces the field dramatically.
Then came the real breakthrough. While analyzing reboot / initialization routines, I found the following string : NanoCRebootFlag
At this point it was basically game over.
This strongly indicates the main chip used inside the Hifiman Supermini is : the Rockchip RK Nano C. A single core Cortex M3 ARM SoC.
Once the SoC was identified, it became much easier to understand the firmware structure.
---------------------
The DAC question :
From an audiophile perspective, the most interesting question is obviously "what DAC does the Supermini actually use?"
Hifiman marketing only mentions a "low power controller chip with a built-in DAC", which is vague. At first, I assumed the Supermini might use the DAC integrated in the RK NanoC, since the chip is theoretically capable of 24-bit / 192 kHz, matching the advertised specs. I also found references in the firmware to something called a "Rock codec", but it didn't lead anywhere meaningful. That was suspicious.
Then I found what appears to be the missing piece of the puzzle. The mention of a Realtek ALC5633 codec (DAC + ADC + processing blocks) inside the Supermini.
Initially I thought this chip was only used for EQ purposes, because the firmware clearly contains a custom EQ configuration. However, the Supermini has no user-accessible EQ.
Then, I understand. Hifiman claimed they tuned the sound to match the HM901 signature. So the EQ in the firmware is very likely part of this tuning strategy.
While continuing analysis, I found a frequency table ranging only from 8 kHz to 48 kHz. That immediately raised suspicion. Why would a device advertised for 192 kHz cap its internal tables at 48 kHz ? I kept digging and found the key evidence.
------------------------------
Initialization Registers :
The real confirmation came from analyzing the hardware initialization sequence for the ALC5633. Two I2C writes were especially interesting.
Register 0x34 > During initialization, register 0x34 is set to 0x0000. This register controls the I2S mode. With all bits cleared, the default configuration applies, including the I2S mode being in "Master mode". This implies the ALC5633 uses its internal PLL for clock generation, rather than relying on an external oscillator (like TCXO).
Immediately after initialization, register 0x38 is set to 0x1000. Meaning all bits are 0 except the bit 12. Accordingly to the ALC5633 datasheet, Bit 12 controls the DAC word length : 0 = 32 bits, 1 = 16 bits. So this force the ALC5633 in 16 bit mode. This is extremely important.
Looking at the Rockship RK NanoC datasheet, its I2S bus is limited to 16 bit / 48 kHz max. And the ALC5633 is explicitly configured to 16 bits mode. So everything aligns perfectly.
But, there's more !
----------------------
DSD 2 PCM conversion :
While investigating the firmware further, I also found multiple functions clearly dedicated to real-time DSD-to-PCM conversion, implemented as a streaming pipeline.
The code performs DSD processing block by block, using a FIR-based approach (with LUT + accumulate stages), which strongly suggests that the Supermini doesn't support native DSD playback at the hardware level. Instead, DSD is decoded and immediately converted into PCM internally.
More importantly, the conversion stage also includes explicit down-quantization to 16 bit, which perfectly matches the previously discovered hardware configuration (RK NanoC I2S limitations + ALC5633 forced into 16 bit mode). In other words, DSD support appears to be entirely software-based : DSD is converted to PCM in software, reduced to 16 bit, then sent over I2S to the Realtek codec for the actual DAC conversion.
-------------------------------
At this point, the complete audio stack becomes clear :
Flac / DSD -> RK NanoC (decode + optional dsd2pcm + downsampling to 16bit/48 kHz) -> I2S -> ALC5633 -> opamp -> Jack
Hifiman's marketing suggests a "low power controller with built-in DAC" and promotes support for 24 bit / 192 kHz and DSD playback. However, firmware analysis strongly indicates that high resolution formats are handled purely at the sofware level. In practice the internal audio pipeline appears to be limited to 16 bit / 48 kHz PCM over I2S feeding a Realtek ALC5633 codec configured in 16 bit mode, with DSD being converted to PCM in realtime before reaching the DAC stage.
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