@Dlomb11 let's put it this way; hard to program, not well documented at all, made really for something else and include ASIC's and DSP's (that you again don't have access to) for such, big, chunky, expensive and noisy. Now you get a better picture. Now compare that to the SoC powering something like Samsung late buds (complete analog/digital system with DSP and all) that you could implement even in something like large 6.35 mm jack hosting. So why on earth would you prefer to use GPU? We are stuck with development because there is a need for Linux (Kernel) mainlined SoC - development board with potent DSP that is well documented and potent enough everything else to get it out public or open source if you wish. Today you at best get 64 bit FP (not for a sakes of audio precision but as wide as that) procsing done on CPU FPU - MPC units. Even moving to SIMD's (again not really easy to program) would be a big gain in both efficiency and processing power as you would have 128~256 bit vectors to pack them. Of course this is for architectures which incorporate SIMD's and per each one independently. Future evolution of multipurpose multi functional accelerators should be based on flexible DSP's and again only well documented and with appropriate toll chains disregarding of their additional graphic processing capabilities or if they are taylored for such in the first place (GPU's are large DSP areas after all).
Described Nv series are future more tailored for graphic processing and even lose badly in duble precision calculations floting point calculations to average desktop CPU's with good optimised code because their FP duble precision performance is deliberately crippled severely by manufacturers (if you unlocked FP64 you have to get Quadro or such and the same thing goes for AMD).
To be fair they are much faster in 32 bit FP and integer (24, 32 & 64 bit) operations.
GPU's on propetry snake legs (no documentation no access on higher level) architecture is worth of development time (including pretty much all GPU's and DSP architectures from such as QC).