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Noise is supposed to be 140dB down with this chip, but I don't know exactly how it reflect in measurements.pos, is it noise or distortion an SOTA implemented ASRC typically adds? Or both?
I remember you prefered your next dac to have ASRC some time ago, referring to Benchmark Dac3. Have you changed your mind about this?
Having an ASRC is one way of dealing with the incoming signal, the other common one being to recover the original clock with a receiver chip.
Here the two methods seem to be chained one after the other.
Here is what Michael Grace had to say about this in the balanced SDAC discussion on massdrop:
The balanced sdac uses a AKM4117 chipOur decision to use a hardware spdif receiver rather than an ASRC is two fold. While ASRCs have gotten much better over the past few years we still believe that if you can recover the embedded clock and keep jitter to well below the dynamic range of the converter then it is always better to maintain bit accurate transmission. In the case of the SDAC we are able to fully maintain the performance of the DAC so there would be not performance increase, only possible degradation due to the conversion process. Also, while ASRC chips and DACs with SPDIF/ASRC inputs are easy to use and relieve the designer of much of the careful clock design tasks the good ones are expensive and would be outside of the budget for this DAC.