GALA DAC - New Product, Coming Soon

[pos]

pos, is it noise or distortion an SOTA implemented ASRC typically adds? Or both?
I remember you prefered your next dac to have ASRC some time ago, referring to Benchmark Dac3. Have you changed your mind about this?

Noise is supposed to be 140dB down with this chip, but I don't know exactly how it reflect in measurements.
Having an ASRC is one way of dealing with the incoming signal, the other common one being to recover the original clock with a receiver chip.
Here the two methods seem to be chained one after the other.

Here is what Michael Grace had to say about this in the balanced SDAC discussion on massdrop:

Our decision to use a hardware spdif receiver rather than an ASRC is two fold. While ASRCs have gotten much better over the past few years we still believe that if you can recover the embedded clock and keep jitter to well below the dynamic range of the converter then it is always better to maintain bit accurate transmission. In the case of the SDAC we are able to fully maintain the performance of the DAC so there would be not performance increase, only possible degradation due to the conversion process. Also, while ASRC chips and DACs with SPDIF/ASRC inputs are easy to use and relieve the designer of much of the careful clock design tasks the good ones are expensive and would be outside of the budget for this DAC.

The balanced sdac uses a AKM4117 chip

 

[orchardaudio]

The datasheet describes how ASRC bypass is enabled, with pin 9.

Bypass is not used because it would also disable the volume control.

 

[orchardaudio]

The master clock is still coming from the the SPDIF reciever, it is not touched by the 4193.

 

[pos]

As far as I understand it that does not necessarily mean the resampling process is not active.

Is it possible to bypass it with a jumper then, acting on that particular pin?
Would that be the same as the method you mentioned above? (soldering + wiring)
If you could send Amir two units, one with the chip active and another one with the chip bypassed (with the pin or with a real bypass) then we would know for sure if/how it affects the signal.

 

[rajapruk]

Bypass is not used because it would also disable the volume control.

I see. A way for the user to enable this bypass would be cool. A switch for enabling/disabling volume-control (and then probably also one extra unnecessary ASRC in the process can be disabled)

The main purpose of this chip from TI is to do ASRC, so my bet is it always does an ASRC (if not bypassed).

 

[orchardaudio]

This is how GALA is supposed to measure, but with better SNR and jitter, considering that its is essentially ApplePi Volume-Clocker and ApplePi DAC combined with an S/Pdif reciever and lower noise power supplies.

https://www.audiosciencereview.com/...o-applepi-dac-and-volume-clocker-reivew.4904/

 

[rajapruk]

Regarding the channel differences, this seems to be an feature of the TI PCM1794A chip itself:
http://nihtila.com/2017/01/12/pcm1794a-leftright-channel-differences/

 

[SchwarzeWolke]

@orchardaudio:
Is it possible to postpone the Indigogo campaign to the point where we get the results from Amir with the new and working Gala Dac? I just want to be sure that if I back this capmpaign that it at least measures well.

 

[orchardaudio]

Is it possible to postpone the Indigogo campaign to the point where we get the results from Amir with the new and working Gala Dac? I just want to be sure that if I back this capmpaign that it at least measures well.

Yes it is possible.

 

[orchardaudio]

Here is some good news, for those who sign up for the mailing list the price will now be $325, as I figured out how to lower my manufacturing costs slightly.

You can sign up for the mailing list here:
https://www.indiegogo.com/projects/gala-ultra-high-performance-stereo-dac/coming_soon/x/19247162

I will have an APx525 available to me starting next week and should be able to verify that Amir's unit was repaired properly.

Indiegogo project should be launching in early November.

 

[orchardaudio]

Here is the SNR measurement:

Keep in mind that the residual noise from the analyzer needs to be subtracted out from the measurement. 128.4dB means a total noise of 1.9uV reference to 5V.

From there we have to subtract out the noise from the analyzer (1uV):
1.9= sqrt(1^2+X^2), solving for X yields a noise of 1.61uV from the DAC.

1.61uV is equivalent to 129.84dB, so I can safely claim that the SNR is 130dB A-Weigthed.

 

[rajapruk]

Impressive figures.

 

[Veri]

Really high SNR indeed.

 

[orchardaudio]

Bandwidth:

Frequency Response:

Dynamic Range (A-wt.):

 

[rajapruk]

I really look forward to read the @amirm re-test of the repaired dac.

 

[rajapruk]

@orchardaudio, the dynamic range here is about 3dB higher than in amirm's first measurement of the faulty device. Is it the A-weighting that is the difference, or did the repair affect this measure you think?

 

[orchardaudio]

@orchardaudio, the dynamic range here is about 3dB higher than in amirm's first measurement of the faulty device. Is it the A-weighting that is the difference, or did the repair affect this measure you think?

Its about 50/50 as with A-Weighting disabled there was 1.5dB difference.

 

[orchardaudio]

I had send two GALA boards to the manufacturer for repair and they screwed up both repairs. One board the left channel is broken and the other board left channel is broken. Needless to say I am not going to be using that manufacturer any more.

In any case I was able to do some modifications at home to get everything to work, unfortunately it is not something I can send to Amir, I will have to order new boards.

I will be launching the project and all items will be addressed on the final rev of the board.
Based on all of the work that I did I know, what circuitry needs to be adjusted, see images below.

Here are the measurements:

SNR (A-Wt.) -- As per above post when analyzer's residual noise is subtracted out you get 130dB.

Dynamic Range (A-wt):

Dynamic Range (no-weighting):

THD+N vs. Level:

Frequency Response:

Jitter (256k FFT w/ 16 averages):
(I have a solution for the jitter also, here you can see a significant reduction in the noise floor of the jitter measurement

 

[pos]

Very nice!
Could we see a 1kHz measurement (0dBFs and maybe -20dBFS) to see what do the distortion products look like?
Could you also please do a jitter measurement with the SRC chip logically or physically bypassed?

 

[orchardaudio]

Very nice!
Could we see a 1kHz measurement (0dBFs and maybe -20dBFS) to see what do the distortion products look like?
Could you also please do a jitter measurement with the SRC chip logically or physically bypassed?

Tbe jitter looks identical with the SRC and with out. I can post it but you will not be able to tell the difference.

1kHz measurement of what?