Yes, but not for IMDThey are there for the 1KHz .
Yes, but not for IMDThey are there for the 1KHz .
Yes, but not for IMD
Yes, a simple line driver connected to the LRCK pin would do it. You'd need to check the specs of the receiving equipment for the expected signal level.There's another solution I thought about as I can sync from SPDIF/AES/ADAT or... Word.
The LRCK pin is supposed to output the Word clock (it's the same), but how to get that out ? just linking this LRCK pin and Ground pin to a BNC connector, with maybe something to amplify and regulate the signal ?
The WM8805 chip on that board needs this signal in order to operate. As can be seen in the photos, it is wired to the input connector (via a buffer). The MCLK signal must be supplied externally, or the chip won't do anything at all. It's not part of the I2S spec, but it is still needed by this device. The description says as much too, though it's strangely worded (poor translation).What I don't understand is why the above board would absolutely need the MCLK signal.
Thanks @mansr !Yes, a simple line driver connected to the LRCK pin would do it. You'd need to check the specs of the receiving equipment for the expected signal level.
The WM8805 chip on that board needs this signal in order to operate. As can be seen in the photos, it is wired to the input connector (via a buffer). The MCLK signal must be supplied externally, or the chip won't do anything at all. It's not part of the I2S spec, but it is still needed by this device. The description says as much too, though it's strangely worded (poor translation).
That's amazing....Grade 0..
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Hi @mansr ,You'll need to connect those signals to an AES/EBU transmitter such as Texas Instruments DIT4192 or Cirrus CS8406. Both of these require a master clock at 128 or 256 times Fs. This can be generated from the word clock using a clock multiplier, e.g. the Cirrus CS2300-03. You'll also need power supply, output transformer, and some passive components. Maybe there's a ready-made board available somewhere.
Those boards resample the input to a fixed output rate. That's not what you want.Hi @mansr ,
do you think that this board would work to generate to MCLK , then sending the 4 signal to another board converting I2S (with MCLK this time) to SPDIF/AES ?
View attachment 160699
The point that I'm not sure how to handle it is the constant output of 211kHz :
Chipset: CS8421Input Sampling Rate: Up to 192kHz (16 / 32Bit)Constant Output Sampling Rate: 211kHzPower Supply: 5V DCI suppose that it's due to the 27MHz chip, so would it possible to replace it with a 24.576 one ?
EDIT : just found one with a 24.576 chip :
aliexpress.com/item/33035364226.html
View attachment 160700
or this one :
View attachment 160701
Right, just realized that some minutes ago, even if it should work if using only 192kHz on the Cosmos ADC, shouldn't it ?Those boards resample the input to a fixed output rate. That's not what you want.
It would work, but the quality of that ASRC chip probably isn't great.Right, just realized that some minutes ago, even if it should work if using only 192kHz on the Cosmos ADC, shouldn't it ?
Certainly, I thought at first there was a way to run it as slave and bypassing the conversion. I only found in the CS8421 data sheet that it can run as slave, and even bypassing the conversion but I didn't find if it still output the MCLK in this case.It would work, but the quality of that ASRC chip probably isn't great.
Either the Twisted Pear Metronome or my own Constellation board (much cheaper but unavailable to order until next week) would work well. The reference clock output on my board (and possibly the Metronome) is active regardless of IO mode, unless the RCLK switch is in the off position.Hi @mansr ,
do you think that this board would work to generate to MCLK , then sending the 4 signal to another board converting I2S (with MCLK this time) to SPDIF/AES ?
View attachment 160699
The point that I'm not sure how to handle it is the constant output of 211kHz :
Chipset: CS8421Input Sampling Rate: Up to 192kHz (16 / 32Bit)Constant Output Sampling Rate: 211kHzPower Supply: 5V DCI suppose that it's due to the 27MHz chip, so would it possible to replace it with a 24.576 one ?
EDIT : just found one with a 24.576 chip :
aliexpress.com/item/33035364226.html
View attachment 160700
or this one :
View attachment 160701
Those also use an ASRC.Either the Twisted Pear Metronome or my own Constellation board (much cheaper but unavailable to order until next week) would work well. The reference clock output on my board (and possibly the Metronome) is active unless the RCLK switch is in the off position.
They do. The SRC4192 exhibits a SINAD of 140dB, which is perfectly adequate for any purpose.Those also use an ASRC.
There's also the jitter aspect which that figure doesn't take into account.They do. The SRC4192 exhibits a SINAD of 140dB, which is perfectly adequate for any purpose.
The sum of all uncorrelated jitter is represented by the dynamic range and by extension SINAD/THD+N. Correlated jitter is a somewhat more complex matter but that's going to be largely dependent upon the clock source and not the ASRC.There's also the jitter aspect which that figure doesn't take into account.
Skirting caused by random jitter is typically included in the fundamental when calculating THD+N while distinct spurs count as noise.The sum of all uncorrelated jitter is represented by the dynamic range and by extension SINAD/THD+N. Correlated jitter is a somewhat more complex matter but that's going to be largely dependent upon the clock source and not the ASRC.
For multiple tones you need a measurement function that removes all stimulus tones from the FFT result. The remaning rest is Total Distortion plus Noise, TD+N (not THD+N). Not sure REW supports this at all. AP does.