Dirac ART is now running on beta FW for Denon Xx800H AVRs!

[EWL5]

Just to close the loop on a question I asked a while ago regarding: number of cross terms available on D/M machines per configuration...

I've seen a couple of other reports of folks reporting 92 cross terms available on 15 channel capable AVR/AVPs. All were running 9.4.6 configurations, as am I. So I think it's pretty definitive that maximizing channel count on these systems reduces the number of cross terms available. I don't know why Dirac couldn't confirm this when I asked them, but whatever.

As for me, I'm enjoying the post ART world of no more tweaking, just enjoying. It's a blessed relief.

I'd be very surprised if Onkyo's 2027 lineup somehow manages to beat the D&M limit. They need a win bad...

 

[Oddball]

Just to close the loop on a question I asked a while ago regarding: number of cross terms available on D/M machines per configuration...

I've seen a couple of other reports of folks reporting 92 cross terms available on 15 channel capable AVR/AVPs. All were running 9.4.6 configurations, as am I. So I think it's pretty definitive that maximizing channel count on these systems reduces the number of cross terms available. I don't know why Dirac couldn't confirm this when I asked them, but whatever.

As for me, I'm enjoying the post ART world of no more tweaking, just enjoying. It's a blessed relief.

I am with you. Just works and it does it well, so I am fully just into content for last 4 months of so. Feels really as a blessed relief.

Interesting how D&M implementation would have a channel penalty. Perhaps they take into account groups and each group cross supporting speakers in that group by default. I have 9.4.4 and filter count is 94. So with 2 more height speakers aka 9.4.6, it seems that 2 filters are used for the additional speakers so the count goes to 92.

 

[middlemarch]

I just wonder if it's a processing horsepower limit or a memory limit. I'm leaning towards memory limit since the processor can obviously handle 96 cross terms in other systems. If it's a memory limit one can always hope that a future firmware update could improve efficiency somehow and get us the cross terms back. But I'm not holding my breath

 

[EWL5]

I just wonder if it's a processing horsepower limit or a memory limit. I'm leaning towards memory limit since the processor can obviously handle 96 cross terms in other systems. If it's a memory limit one can always hope that a future firmware update could improve efficiency somehow and get us the cross terms back. But I'm not holding my breath

The same SHARC chip is used in all the Dirac-capable D&M AVRs and presumably A1H/AV10 so I'm not sure if there's going to be a difference!

 

[middlemarch]

The same SHARC chip is used in all the Dirac-capable D&M AVRs and presumably A1H/AV10 so I'm not sure if there's going to be a difference!

Fully agree, but the more channels you have the more things to keep track of in memory, so if it's memory constrained you'd expect some give and take at some point, and if my suspicion is anywhere near correct the 'give' is number of cross terms available when approaching those limits.

So ironically, the more capable (and expensive) the AVR the more constrained the ART possibilities. Now this is clearly an edge case, so I doubt the end result is much degraded and may not be noticeable in any event, but it would be nice to be able to test the hypothesis. There are also reports of a 94 cross term limit on some configurations, but I really haven't followed those that closely.

It will be really interesting to see what the Sharc configuration is on the new x3900 when it shows up. So far no hints that I'm aware of.

I guess this discussion really belongs in the A1H or AV10 threads, doesn't seem to affect units with fewer than 15 channels.