I mean ZCM output.
In addition to the standard XLR input, the Cosmos ADC has a 2.5 jack, maximum input 42V.
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Axign/AX5689.... Fresh From the Bench: Improving GaN with Digital Control
- Thread starter KL....
- Start date
ZCM is PWM. It's just a special encoding that eliminates common-mode voltage and also aims to reduce EMI, making compliance of these amps much easier.
- Thread Starter
- #63
@GaNMaster, Thank you, yes, nice to know that the AX5689 can do ZCM/zero-CM PWM/ZCMPWM :=)
It would appear that this an aspect of the AX5689 software, is that correct?
Pulse Width Modulation Strategy for Eliminating Common-Mode Voltage in T-Type Three-Level Inverters Considering Dead Time - June 2025
- This study focuses on the T-type three-level voltage source inverter, offering two key methods for achieving zero common-mode voltage pulse-width modulation (ZCM-PWM): the space vector approach and the carrier-based approach. To address the challenge of common-mode voltage (CMV) fluctuations induced by dead-time (DT) effects during ZCMPWM, a novel and practical DT compensation method is proposed. This method entails delaying the rising or falling edge of the drive signal by a predetermined DT, based on the polarity of the output current, and subsequently incorporating DT into the compensated drive signal. Theoretically, the proposed enhanced ZCM-PWM method effectively eliminates the adverse effects of DT on CMV while maintaining a simple and practical implementation framework.
Dead-Time Effect Compensation Method Based on Current Ripple Prediction for Voltage-Source Inverters - March 2018
- (file:///C%3A/Users/KL1/Downloads/5.Dead-TimeEffectCompensationMethod.pdf)
CM voltage comparison between for zero-CM PWM with different dead times.
In voltage source inverters (VSI), dead-time is used to prevent shoot-through over switching devices. However, the existence of dead-time will distort output phase current which degrades the performance of inverter as well as influences the common-mode voltage (CMV), particularly in CMV elimination relevant modulation schemes, such as zero-CM PWM based paralleled inverters. On the basis of the situation that the normal sampling based dead-time compensation (DTC) methods are often disturbed by the current ripple, this paper introduces a novel DTC method for VSI which can mitigate the impact of current ripple and improve the accuracy of DTC. The proposed method deduces the real-time current ripple which can reconstruct the actual trajectory of phase-leg currents, and the peak values corresponding to rising and falling edges for pulse width modulation (PWM) signals can be predicted. In this way, DTC can be implemented based on the direction of relevant instantaneous switching currents and finally improve the accuracy. Especially, the current ripple prediction (CRP) based DTC can help to improve the CMV distortion caused by dead-time for paralleled inverters with zero-CM PWM. Simulation and experimental results are provided to validate that the proposed method can be applied with good performance.
1. Topology and modulation scheme for paralleled inverters. (a) Structure of a paralleled inverter with load. (b) Zero-CM PWM scheme.…
2. CM voltage comparison between for zero-CM PWM with different dead times.…
3. Channel flow of the phase current. (a) i a > 0. (b) i a < 0.…
4. Comparison of ideal and actual waveforms for gate signals and pole voltages. (a) i a > 0. (b) i a < 0.…
5. All kinds of ZCC situations and the corresponding output pole voltage under the ideal condition.…
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... because of the dead-time effect, the performance of CMV elimination cannot be well achieved like an idea case. Fig. 2 shows the experimental results of the CMV for zero-CM PWM with normal and negligible dead times. The zero-CM PWM scheme with a negligible dead time can nearly eliminate the CMV, while the performance of CMV elimination with a normal dead time is obviously degraded with narrow pulses caused by the dead-time effect [19], [20]. So, the ...
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... 18 and 19 have validated the proposed CRP-based DTC for a regular three-phase inverter with a low modulation index, with which the dead-time's ratio in duty cycles and current ripple's ratio in full current are big. A more general case is also studied in the experiment (with m = 0.7). The current waveforms for four cases are shown in Fig. 20. The current waveform distortion caused by the dead time is less obvious than that of Fig. 18. But the comparison shows similar results: with CRP based DTC, the current distortion can be improved better than with normal DTC. The scheme with DTC and CRP can realize the best performance of low harmonics suppression, which can get the ...
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... the dynamic conditions are implemented for different situations when the modulation index has a step transient from 0.2 to 0.3. It can be found that the proposed DTC method can realize similar performance compared to the ideal condition in different steady states, as shown in Fig. 22(a) and (d), while the other schemes are disturbed by the obvious harmonic currents, as shown in Fig. 22(b) and (c). In addition, considering the dynamic process, it can be found that all schemes have a similar response, which is owing to the fact that the DTC method has a little influence on the output volt-second of phase legs that cannot lead ...
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... for different situations when the modulation index has a step transient from 0.2 to 0.3. It can be found that the proposed DTC method can realize similar performance compared to the ideal condition in different steady states, as shown in Fig. 22(a) and (d), while the other schemes are disturbed by the obvious harmonic currents, as shown in Fig. 22(b) and (c). In addition, considering the dynamic process, it can be found that all schemes have a similar response, which is owing to the fact that the DTC method has a little influence on the output volt-second of phase legs that cannot lead to the sudden change of phase currents; the step change of current is mainly caused by the ...
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... the circulating current in paralleled phase legs aggravates; this leads to bigger current ripple in phase-leg currents compared to a single VSI. The proposed DTC method is first tested under a relatively low modulation index (m = 0.4), which makes the phase-leg currents locate in the Z-zone more frequently. Following the same comparison method, Fig. 23 shows the detailed results. It can be clearly seen that the phase current keeps sinusoidal and the CMV is basically eliminated under the ideal condition, as shown in Fig. 23(a); the current jump in the phase-leg current is attributed to the modulation algorithm, which has two times instantaneous volt-second unbalance in one fundamental ...
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... first tested under a relatively low modulation index (m = 0.4), which makes the phase-leg currents locate in the Z-zone more frequently. Following the same comparison method, Fig. 23 shows the detailed results. It can be clearly seen that the phase current keeps sinusoidal and the CMV is basically eliminated under the ideal condition, as shown in Fig. 23(a); the current jump in the phase-leg current is attributed to the modulation algorithm, which has two times instantaneous volt-second unbalance in one fundamental period. Fig. 23(b) shows the dead-time effect for zero-CM PWM, which not only generates harmonic currents but also degrades the CMV elimination effect; this phenomenon is ...
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... 23 shows the detailed results. It can be clearly seen that the phase current keeps sinusoidal and the CMV is basically eliminated under the ideal condition, as shown in Fig. 23(a); the current jump in the phase-leg current is attributed to the modulation algorithm, which has two times instantaneous volt-second unbalance in one fundamental period. Fig. 23(b) shows the dead-time effect for zero-CM PWM, which not only generates harmonic currents but also degrades the CMV elimination effect; this phenomenon is coincided with the simulation result. The zoom-in waveform shows that the nonzero CMVs are spikes, in which the duration time is equal to or less than the dead-time interval. Fig. 23(c) ...
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... period. Fig. 23(b) shows the dead-time effect for zero-CM PWM, which not only generates harmonic currents but also degrades the CMV elimination effect; this phenomenon is coincided with the simulation result. The zoom-in waveform shows that the nonzero CMVs are spikes, in which the duration time is equal to or less than the dead-time interval. Fig. 23(c) shows the result of the normal DTC method, in which harmonics still distort the waveform. At the same time, the CMVs occur in the whole fundamental period, which is even worse than the without DTC scheme; this phenomenon is caused by the error judging the direction of phase-leg currents in the dead-time interval with the ignorance of a ...
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... result of the normal DTC method, in which harmonics still distort the waveform. At the same time, the CMVs occur in the whole fundamental period, which is even worse than the without DTC scheme; this phenomenon is caused by the error judging the direction of phase-leg currents in the dead-time interval with the ignorance of a big current ripple. Fig. 23(d) shows the phase current with the proposed DTC method, which takes the current ripple into consideration by utilizing the CRP model; the output phase current keeps sinusoidal and is similar to the ideal condition. Meanwhile, the implementation of more accurate DTC makes the CMV elimination effect more realistic, in which only few CMV ...
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... THD and low-order harmonics of phase currents are further analyzed and shown in Fig. 24. The THDs are 8.32%, 8.95%, 9.12%, and 8.14% correspondingly, which shows good performance of the proposed method. The harmonic currents caused by the dead time are obviously decreased by utilizing the proposed method. So, the proposed method is effective for DTC under this ...
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... addition, the 10-nF CM capacitance is added between the middle point of the dc link and the ac neutral point to simulate the CM stray circuit and test the effect of CM current suppression. The CM currents have been measured for the different cases with the existence of dead time and are compared in Fig. 25. The proposed DTC method can achieve the best CM current suppression either in the amplitude reduction or the dwell time. This is owing to the good performance of CMV suppression. So, the proposed DTC method can be implemented in paralleled inverters and can improve the DTC ...
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... the dynamic conditions are also implemented for paralleled inverters when the modulation index has a step transient from 0.4 to 0.5, as shown in Fig. 26. The proposed DTC method can also achieve similar performance to the ideal condition with the time-domain comparison as shown in Fig. 26(a) and (d), while obvious harmonics influence other schemes in different steady states, as shown in Fig. 26(b) and (c). Meanwhile, the dynamic process of all the schemes has a similar response. The ...
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... the dynamic conditions are also implemented for paralleled inverters when the modulation index has a step transient from 0.4 to 0.5, as shown in Fig. 26. The proposed DTC method can also achieve similar performance to the ideal condition with the time-domain comparison as shown in Fig. 26(a) and (d), while obvious harmonics influence other schemes in different steady states, as shown in Fig. 26(b) and (c). Meanwhile, the dynamic process of all the schemes has a similar response. The reason is owing to the fact that the influence of dead time on the output volt-second is limited; the dynamic response of ...
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... for paralleled inverters when the modulation index has a step transient from 0.4 to 0.5, as shown in Fig. 26. The proposed DTC method can also achieve similar performance to the ideal condition with the time-domain comparison as shown in Fig. 26(a) and (d), while obvious harmonics influence other schemes in different steady states, as shown in Fig. 26(b) and (c). Meanwhile, the dynamic process of all the schemes has a similar response. The reason is owing to the fact that the influence of dead time on the output volt-second is limited; the dynamic response of ...
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- Thread Starter
- #64
@GaNMaster, Thank you, what measurement/numbers, on the graph/s, were you expecting? Such as, were you expecting better measurements 700-1.5K/900-5k/etc?
What are you thoughts/observations with the 1.2Mhz/ZCMPWM and the resulting relationship between the AX5689 and LC/PFFB architecture. Such as, the LC should/will be simpler, especially re Heat/Size/Linearity/etc, shouldn't it? The AX5689 needs handle the shorter Dead Time (appears/seems to handle it well) as does the ISG3202 (appears/seems to handle it well), don't they?
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- Thread Starter
- #66
@GaNMaster, Thank you, yes, you know that you could be asked to define 'better' but perhaps in this instance, sufficient. It could be suggested that the L is very/especially important, re Linearity/PFFB and V/I/EM/Output Impedance/etc consideration/s, isn't it?
4-5 nanoseconds.... Can the AX5689 handle even shorter dead time than this?
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- Thread Starter
- #67
@GaNMaster, Thank you, have you measured the Sabaj A30a in the same way that you measured your AX5689 project/configuration?
If yes, do you mind posting the measurement/graph?
Yes
I just took measurements and didn't save them.
- Thread Starter
- #70
@GaNMaster, Thank you/fabulous, what is the shortest dead time that the AX5689 can handle? Such as, what would be the required dead time for 2Mhz or even 5Mhz?
If possible/correct, it seems that/like the AX5689/PFFB could be a Preamp with Analog out, feeding an Amp where for a ClassD/Amp it might/might not include AX5689/PFFB?
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- Thread Starter
- #71
@GaNMaster, ah, with your setup, it would have been nice to compare their measurement/s which you have probablely already done.... have you compared measurement/s?
- Thread Starter
- #72
@GaNMaster, Thank you, Innoscience ISG3202 tested/measured and ISG3208/ISG3208EA now utilised, noted. Look forward to reading of your new measurement/s :=)
- Thread Starter
- #73
Press Release Axign at CES 2023.... Axign introduces Advanced Sound Processors and Power Stages for Class-D Audio Amplifier solutions
The Axign Controllers (AX5688 and AX5689) are migrating into Axign Sound Processors (AX5690 and AX5691). These new chips will be able to run the most complex programmable algorithms to better control the dynamics of loudspeakers based on real-time post-filter voltage and current feedback. These new products support a wide operating range without critical external components, to reproduce the best audio quality, while saving energy.
Power consumption reduction is one of Axign’s key focus areas. Idle losses are unwanted power losses, which produce heat or discharge the battery faster. Due to Axign’s digital control loop and its post filter feedback, idle losses can be reduced up to 15 times compared to previous modulation schemes and solutions. High-power GaN and MOSFET-based audio amplifier solutions remain cool.
For output powers up to 60W in 4 Ohm BTL per channel, Axign will introduce its own (heatsinkless) two-channel power stages (AX1225 and AX1250), which are further optimized for lowest power consumption levels. Axign’s target applications are battery-powered or mains-powered active speakers (BT speakers, soundbars and subwoofers) and streaming audio amplifiers.
- Lowest power consumption
- Longer battery playing time
- Cool and cost-competitive audio amplifier solutions
- Award winning audio quality
The Axign Controllers (AX5688 and AX5689) are migrating into Axign Sound Processors (AX5690 and AX5691). These new chips will be able to run the most complex programmable algorithms to better control the dynamics of loudspeakers based on real-time post-filter voltage and current feedback. These new products support a wide operating range without critical external components, to reproduce the best audio quality, while saving energy.
Power consumption reduction is one of Axign’s key focus areas. Idle losses are unwanted power losses, which produce heat or discharge the battery faster. Due to Axign’s digital control loop and its post filter feedback, idle losses can be reduced up to 15 times compared to previous modulation schemes and solutions. High-power GaN and MOSFET-based audio amplifier solutions remain cool.
For output powers up to 60W in 4 Ohm BTL per channel, Axign will introduce its own (heatsinkless) two-channel power stages (AX1225 and AX1250), which are further optimized for lowest power consumption levels. Axign’s target applications are battery-powered or mains-powered active speakers (BT speakers, soundbars and subwoofers) and streaming audio amplifiers.
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- Thread Starter
- #74
Axign acquired by Monolithic Power Systems/MPS Acquires Axign…. Combined with MPS technology, we can bring audiophile quality to the mass market…. Michael Hsing, Founder and CEO
Superior Audio Performance and Efficiency without Compromise.... With the combination of MPS and Axign technologies and solutions, Class-D audio amplifier designers will no longer be forced to choose between audio quality and efficiency. Axign’s customer-proven expertise in digital signal processing and analog/power/mixed-signal design for consumer and automotive audio applications perfectly complements MPS’s strengths in design and process development, packaging, and manufacturing. Our teams share a passion for delivering complete solutions that exceed our customers’ expectations.
The Sound of Innovation.... Traditional Class-D audio amplifiers struggle to deliver low distortion levels throughout the full audio frequency range, and are forced to trade off power consumption for audio fidelity. MPS + Axign’s solution leverages ultra-fast data conversion and a fully digital control loop to take feedback directly from the loudspeaker, instead of before the power stage’s output filter. This architecture not only ensures that the sound from the loudspeaker is an accurate reproduction of the audio source, but also enables such precise control of the Class-D pulse-width modulation (PWM) signals that negligible power is consumed in the power stage or output filter.
Superior Audio Performance and Efficiency without Compromise.... With the combination of MPS and Axign technologies and solutions, Class-D audio amplifier designers will no longer be forced to choose between audio quality and efficiency. Axign’s customer-proven expertise in digital signal processing and analog/power/mixed-signal design for consumer and automotive audio applications perfectly complements MPS’s strengths in design and process development, packaging, and manufacturing. Our teams share a passion for delivering complete solutions that exceed our customers’ expectations.
The Sound of Innovation.... Traditional Class-D audio amplifiers struggle to deliver low distortion levels throughout the full audio frequency range, and are forced to trade off power consumption for audio fidelity. MPS + Axign’s solution leverages ultra-fast data conversion and a fully digital control loop to take feedback directly from the loudspeaker, instead of before the power stage’s output filter. This architecture not only ensures that the sound from the loudspeaker is an accurate reproduction of the audio source, but also enables such precise control of the Class-D pulse-width modulation (PWM) signals that negligible power is consumed in the power stage or output filter.
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Why are you quoting ancient press releases? What is the point?
- Thread Starter
- #76
Thank you, 20-200hz (86~91 SINAID) isn't the Highest Audio Fidelity, is it? Perhaps their Press Releases need to be Improved/Refined, don't they, or is that as good as it can be?
Fortunately @GaNMaster achieved the following with his (early) implementation, which includes the AX5689C....
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- Thread Starter
- #77
@GaNMaster, this shows at least 5 versions/iterations but it could easyly be suggested that there are (several/many) more, especially now that it is Sep 2025. This would also account for Package changes, wouldn't it?
Roland68
Major Contributor
No, this simply shows the further development at Axign until 2023, mostly internally, i.e., with the AX5688 and AX5689 as the result.
But Axign no longer exists, and the AX5690 and AX5691 seem to have been phased out; at least, there has been no word from MPS that they are being pursued further.
Furthermore, there have been no other major publications on this technology since the acquisition by MPS. The fact that MPS recently released the "C" version of the two ICs at least gives hope that they will be available for a few more years.
It would be nice to hear from MPS about their future plans and whether they will be further developed.
- Thread Starter
- #79
@Roland68, thank you, good information to know :=)
Bit sad if this is the case, isn't it, especially (it would appear so) as the AX5689 can/could (also) be utilised as a Digital Preamp/DAC or DAC (with PFFB), with an array of Digital inputs and (possiblely) 4xRCA & 1xXLR analog inputs (not just as a Digital Integrated Amp and/or other Digital/Analog Integrated Amp/s).
Re The fact that MPS recently released the "C" version of the two ICs at least gives hope that they will be available for a few more years.... yes, hopefully?
Re It would be nice to hear from MPS about their future plans and whether they will be further developed.... yes, that would be very nice, indeed?
Re AX5689S.... have you noticed any information about the AX5689S. It was (apparently) utilised in Fresh From the Bench: Improving GaN with Digital Control as tested by Stuart Yaniger
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