8ch hifiberry hat dac for RPI5

[Wirrunna]

Why not getting some ADC I2S slave module (quite a few on Aliexpress) and hook it directly to the 2-8ch I2S master input of RPi5?

Good question, simple answer - I wouldn't know where to start. Please recommend a device and a link to how to connect it to a RPi.

My aim was to show how to build an analog 2 channel input for a DIY 8 analog channel output $200 DSP that far exceeds the capability of anything else on the market in that price range.
Thanks to your earlier work, an off the shelf ADC RPi HAT mounted on a cheap RPi Zero 2W can be made to work as a USB connected 2 channel analog (ADC) front end to CamillaDSP.

 

[phofman]

Good question, simple answer - I wouldn't know where to start. Please recommend a device and a link to how to connect it to a RPi.

Any simple I2S ADC with slave mode would do. If no MCLK required, then simply the overlay as I already linked at https://audiosciencereview.com/foru...hifiberry-hat-dac-for-rpi5.53672/post-1988822 would do. Some ADC boards need MCLK which is already available from RPi5. That would require some extra config, but no additional HW required. The MCLK output seems to be solved in https://forums.raspberrypi.com/viewtopic.php?t=365761 . The RPi devs would likely help at that forum with any issues.

an off the shelf ADC RPi HAT mounted on a cheap RPi Zero 2W can be made to work as a USB connected 2 channel analog (ADC) front end to CamillaDSP.

Why doing ADC -> I2S -> Pi Zero -> USB -> Pi5 instead of simply ADC -> I2S -> Pi5? Plus you would have clocks synchronized and no need to run async resampling in CDSP.

 

[phofman]

@mdsimon2 :

Please can you post contents of /sys/kernel/debug/clk/clk_summary when playing some 44.1kHz and 48kHz to the 8ch DAC on RPi5? I would like to take a look at the audio MCLK setup. Thanks.

 

[mdsimon2]

@phofman see attached for clk_summary for 44.1 kHz and 48 kHz from the DAC8x on a RPi5 running raspberry pi os 64 bit.

Here are the differences I see:

44.1 kHz

48 kHz

Michael

 

[phofman]

Thanks! That means the current config does not generate any suitable MCLK freq. Plus we do not know which of the clocks in the audio tree can be routed to a GPCLK pin. I've asked RPi devs https://forums.raspberrypi.com/viewtopic.php?p=2237843#p2237843 .

 

[Sicaris]

Any simple I2S ADC with slave mode would do. If no MCLK required, then simply the overlay as I already linked at https://audiosciencereview.com/foru...hifiberry-hat-dac-for-rpi5.53672/post-1988822 would do. Some ADC boards need MCLK which is already available from RPi5. That would require some extra config, but no additional HW required. The MCLK output seems to be solved in https://forums.raspberrypi.com/viewtopic.php?t=365761 . The RPi devs would likely help at that forum with any issues.

Why doing ADC -> I2S -> Pi Zero -> USB -> Pi5 instead of simply ADC -> I2S -> Pi5? Plus you would have clocks synchronized and no need to run async resampling in CDSP.

I love the idea of this setup as progress towards a modern streamer/AVR.

Do you have any suggestions on a headphone amp board such that you could take 2 channels from the dac8x and provide a robust headphone out?

 

[phofman]

@mdsimon2 : The RPi developer responded, IMO we are on a good track.

What kernel do you have? Please install the latest 6.6 available so that we can use the github source code for discussion (probably 'rpi-update stable'). It's probably already the case but I cannot tell from the clk dump.

Please attach whole zipped directory /sys/kernel/debug/clk/ for 44.1 and 48kHz, I would like to take a look at the clk details before continuing the discussion with RPi.

 

[mdsimon2]

@phofman

I am on kernel 6.6, here was output of uname -a prior to running rpi-update stable.

Linux raspberrypi2 6.6.31+rpt-rpi-2712 #1 SMP PREEMPT Debian 1:6.6.31-1+rpt1 (2024-05-29) aarch64 GNU/Linux

After running rpi-update stable I now get.

Linux raspberrypi2 6.6.31-v8-16k+ #1766 SMP PREEMPT Fri May 24 12:15:34 BST 2024 aarch64 GNU/Linux

See attached for zipped clk directories for 44 and 48 kHz.

Michael

 

[phofman]

Thanks! IMO the next step could be testing the feature by hard-coding the MCLK output into the i2s driver. When confirmed that everything works OK, we can discuss with RPi people options for standardization/making it official somehow.

I do not have RPi5 and do not plan on buying one for now (no use for it). Can you recompile kernel as described in https://www.raspberrypi.com/documentation/computers/linux_kernel.html ? If so, you can do so. Then we can talk about possible modifications to https://github.com/raspberrypi/linux/blob/rpi-6.6.y/sound/soc/dwc/dwc-i2s.c , make the .ko module and copy the .ko file to the modules directory individually as needed.

 

[mdsimon2]

Can you recompile kernel as described in https://www.raspberrypi.com/documentation/computers/linux_kernel.html ? If so, you can do so. Then we can talk about possible modifications to https://github.com/raspberrypi/linux/blob/rpi-6.6.y/sound/soc/dwc/dwc-i2s.c , make the .ko module and copy the .ko file to the modules directory individually as needed.

I was able to recompile. What modifications should be made to dwc-i2s.c?

Michael

 

[phofman]

You are fast, hats off.

IMO trying something like this could test the feature:

1) setting pll_audio to 512 fs
2) enabling the pll_audio as a parent of RP1_CLK_GP0 which was disabled in commit https://github.com/raspberrypi/linu...7e77b054ea0a1c2ba9c46b1afc3b39a76bL1948-L1957 - that will require re-installing the whole compiled kernel as the change is in the clocking code, compiled into the image, not just a .ko module
3) actually setting pll_audio as parent to RP1_CLK_GP0
4) enabling the RP1_CLK_GP0 output - probably device tree https://forums.raspberrypi.com/viewtopic.php?p=2237843#p2194016 + extra setup https://forums.raspberrypi.com/viewtopic.php?p=2237843#p2194321 + https://forums.raspberrypi.com/viewtopic.php?p=2237843#p2194333

Unfortunately I will not be at my computer for a few days to check exact code, but you can try:
Ad 1)
Before the line which sets the actual freq of clk_i2s - line https://github.com/raspberrypi/linux/blob/rpi-6.6.y/sound/soc/dwc/dwc-i2s.c#L365 put sth like:

struct clk *parent = clk_get_parent(dev->clk);
ret = clk_set_rate(parent, config->sample_rate * 512);
if (ret) {
  dev_err(dev->dev, "Can't set I2S parent clock rate: %d\n",
          ret);
  return ret;
}

I hope that after the parent freq is set, when subsequently setting the child freq the clk infrastructure will not modify the parent freq - I could not find any details to the clk subsystem and as jdb notices in the rpi forum it's quite picky.

Ad 2) re-add the "pll_audio" string to the respective position in the mux array.

Then you can install the compiled kernel (including the modified dwc i2s module) and check in clk_summary whether pll_audio is at 512 fs when playing some 44.1 of 48kHz stream and that in clk_gp0 subdirectory the clk_possible_parents file contains pll_audio. If yes, in the next step we can try to switch the parent of clk_gp0 to pll_audio mclk and enable the clock output.

 

[renne]

@MCH @mdsimon2 @phofman
Can you help to get the DAC8x supported in MoOde?

 

[m-a]

What's the simplest way to add Toslink input to the DAC8x with Raspberry Pi 5?
I'm considering the DAC8x as a solution for a budget 4 way active crossover. I'm planning to connect my source, either TV or Chromecast Audio, via Toslink to DAC8x running CamillaDSP with a 4 way active crossover speaker set.

Would plugging something like the Hifime UR23 into one of the usb work?
Edit: I just found this thread, looks like it has some good suggestions: Budget Standalone "Toslink > DSP > Toslink" with Camilladsp. Set up instructions for newbies.

It's my first post here. Hello everyone! I'm currently starting my hifi journey, planning to DIY a MEH speaker set

 

[phofman]

I'm planning to connect my source, either TV or Chromecast Audio, via Toslink to DAC8x running CamillaDSP with a 4 way active crossover speaker set.

Depends how much you want to DIY.

Technically the optimal way is SPDIF receiver with freewheeling clock producing I2S master -> CDSP in synchronous mode -> RPi5 I2S input switched to slave -> I2S out -> DAC8x

Typically SPDIF receivers produce I2S master, only some are freewheeling when no SPDIF signal is present. That would need to be investigated.

RPI5 I2S would need to be switched to slave which should be just some DTS overlay config.

If an SPDIF->USB capture card is used, CDSP would need to run in async mode, to adjust for the SPDIF/I2S clock difference. Technically suboptimal, but easier from configuration POV.

Of course both solutions assume the SPDIF stream has a single samplerate. Switching samplerates is more complicated for both cases as typically there is no ready-made way to determine the incoming rate.

 

[mdsimon2]

@m-a The info from @phofman is a great overview of the situation.

My tutorial on GitHub talks through some examples and gives configuration files for dac8x setups with different input devices. I do not have a UR23 based configuration on there as previously the UR23 did not work correctly with the RPi5, but I've been told this has been fixed. The UR23 is a good input device if you have a constant sample rate source, with a sample rate of 96 kHz or less. If you have variable sample rates I think an ASRC is the easiest way to handle it, the tutorial has some discussion about various devices which have an ASRC.

Michael

 

[rthorntn]

ASRC

Thanks, can the Nvarcher AK4137 board that I've seen recommended be connected to a RPi5 with DAC8X?

 

[mdsimon2]

Thanks, can the Nvarcher AK4137 board that I've seen recommended be connected to a RPi5 with DAC8X?

At first glance I don't think it will work as both devices need to use the same SCLK (GPIO 18) and LRCLK (GPIO 19) but will not have synchronous clocks. If there was a way to provide external clock inputs to the AK4137 board I think it might be feasible.

It looks like there is another I2S input block (i2s2) on the RPi5, but I don't see the GPIO pins defined -> https://datasheets.raspberrypi.com/rp1/rp1-peripherals.pdf.

Any thoughts @phofman?

Michael

 

[Tim Curtis]

Dunno if this is relevant but hfb recently posted some kernel commits for an 8ch ADC device.

ASoC: add the HiFiBerry 8-channel ADC soundcard by j-schambacher · Pull Request #6353 · raspberrypi/linux

Additions and changes for the new 8 channel ADC card for the Pi 5. It's a HW controlled device, so we can use the snd-soc-dummy device for the DAI declarations.

github.com

 

[phofman]

At first glance I don't think it will work as both devices need to use the same SCLK (GPIO 18) and LRCLK (GPIO 19) but will not have synchronous clocks. If there was a way to provide external clock inputs to the AK4137 board I think it might be feasible.

If the SPDIF input board is I2S master (very likely), it should just take using I2S1 (clock consumer) and the input board would clock both RPi5 slaved I2S I/O and the DACs slaved I2S.

It looks like there is another I2S input block (i2s2) on the RPi5, but I don't see the GPIO pins defined -> https://datasheets.raspberrypi.com/rp1/rp1-peripherals.pdf.

AFAIR i2s2 is not available on RPi5 pinheader. Maybe it's available on RP1 pins but there is no RP1 pinout published and the chips are not available separately either.

 

[rthorntn]

If the SPDIF input board is I2S master (very likely), it should just take using I2S1 (clock consumer) and the input board would clock both RPi5 slaved I2S I/O and the DACs slaved I2S.

Thanks @phofman @mdsimon2

So should I risk buying one for direct connection?

If it turns out I can't connect the AK4137 directly to the RPi5 I2S should I get the known working "Nvarcher optical launch" board which will get me:

SPDIF input > ASRC > SPDIF output?

I'll probably order the AK4137 and optical output boards, but...

Is there a (non-USB) board we know of that will provide a working SPDIF input on the RPi5 with DAC8X, so an SPDIF input to I2S that can coexist?

So basically an ASRC that stays SPDIF all the way into the RPi5.

Thanks again.