I hope you are not getting tired of jitter talk because I have more info to share .
One of the common arguments made against jitter mattering is that: "the data is buffered and clock regenerated in the DAC so jitter won't be there." This makes all the sense in the world. Once we capture the data and then push it out at our will, there shouldn't be a problem. Well, there is a problem. A serious one. Buffering and clock regeneration do not deal with jitter by themselves. I have explained this in words many times but this time I am bringing in some specific data to hopefully put this myth to bed (yeh, wishful thinking ).
The way a clock is "regenerated" is to have a local oscillator (clock) that we can change its frequency to eventually match and track the incoming digital stream. As you may know, S/PDIF is a serial digital connection with clock and data intermixed. By using this circuit which is called a Phase Locked Loop (or PLL for short), we are...
This is an article I wrote for Widescreen Review Magazine a few months ago.
Inside Your AVR
Do you know what is inside your electronics? What is a DSP? The output stage? Power supply? FPGA? ASIC? Do these terms have any meaning? I suspect for many of you these are obscure terms. Yet, pick up the brochure for any audio/video product and such buzzwords abound. While it is impossible to convey the true nature of these technologies in an article like this, I think we can become more educated and at least have some high level understanding of what goes on inside your electronics. For this article, I am going to open the top of a premium AVR I purchased back in 2007. At the risk of stating the obvious, you are not going to become a design engineer from reading this one article. But rather, get you started on a journey to know more about what is under the hood and what type of design trade off a manufacturer may make. I hope to do...