• WANTED: Happy members who like to discuss audio and other topics related to our interest. Desire to learn and share knowledge of science required. There are many reviews of audio hardware and expert members to help answer your questions. Click here to have your audio equipment measured for free!

GALA DAC - New Product, Coming Soon

orchardaudio

Addicted to Fun and Learning
Audio Company
Joined
Aug 24, 2018
Messages
853
Likes
1,242
Location
Succasunna, NJ
Hello,

I will be launching another product shortly, the GALA DAC.

It is based on the same circuitry as the ApplePi DAC (reviewed here). Uses dual Burr Brown PCM1794A chips in monaural mode, with dual differential outputs.

This DAC has S/Pdif input, "bit-perfect" volume control, and full linear power supplies using LT3042s.

Specs:
SNR: 130dB (0dbFS, A-Weighted)
THD+N: -108dB (0dbFS)
Output Level: 5Vrms
Sample Rates: 44.1, 48, 88.2, 96, 176.4 and 192kHz
Resolution: 16 and 24 bits

Introductory price: $400 ($500 Retail)

Here is a pic of front and back.
GALA_1280x960.jpg


Sign up here to receive updates and get special pricing on launch day:
https://www.indiegogo.com/projects/gala-ultra-high-performance-stereo-dac/coming_soon/x/19247162

Thanks;
Leo
 
Last edited:

pos

Addicted to Fun and Learning
Forum Donor
Joined
Feb 13, 2018
Messages
572
Likes
718
Impressive specs on the S/N, and a simple and neat design!
It is refreshing to see a DAC without USB in, for once :)

A couple of questions if I may:
Is the spdif input transformer coupled? What is the maximum peak to peak voltage it can accept?
How is the spdif clock handled? ASRC?
Is the volume control analog of digital? ("bit perfect" is always a misleading term IMHO)
 
OP
orchardaudio

orchardaudio

Addicted to Fun and Learning
Audio Company
Joined
Aug 24, 2018
Messages
853
Likes
1,242
Location
Succasunna, NJ
Wow thanks for the heads up. Are you sending Amirm a demo to analyze?
If @amirm has the time to work on it. Will have available in early/mid september.

Is the spdif input transformer coupled?
No

How is the spdif clock handled?
I use a Cirrus Cogic CS8416 receiver. Very good chip that re-clocks everything making the DAC essentially jitter immune.

Is the volume control analog of digital?
Digital, using Burr Brown SRC4193.
 
Last edited:

pos

Addicted to Fun and Learning
Forum Donor
Joined
Feb 13, 2018
Messages
572
Likes
718
I use a Cirrus Cogic CS8416 receiver. Very good chip that re-clocks everything making the DAC essentially jitter immune.
Will several units be (and stay) in sync when fed from different spdif signals from the same source/clock?

Digital, using Burr Brown SRC4193.
So is the SRC functionbality of that chip disabled?
What happens when the volume pot is at its max position?

Regarding spidf input, do you know the maximum P-P voltage it can get?
I would need to convert from a 3.3V AES3 output.
The 110/75 transformer should already bring that down to about 2.7V, is that acceptable?
 

Krunok

Major Contributor
Joined
Mar 25, 2018
Messages
4,600
Likes
3,065
Location
Zg, Cro
No, only using the knob on the front.

The volume on the DAC can be set to max (disabled), and be controlled remotely over SPdif, there are cheap devices that offer this feature.

Yep, I have one of those based on the Xmos XU208. How does that volume control work, is it also bit perfect? Does it use the upper 8 bits of the 32 bit word?
 
OP
orchardaudio

orchardaudio

Addicted to Fun and Learning
Audio Company
Joined
Aug 24, 2018
Messages
853
Likes
1,242
Location
Succasunna, NJ
Will several units be (and stay) in sync when fed from different spdif signals from the same source/clock
They should minus very small tolerance difference in the delays from board to board.

So is the SRC functionbality of that chip disabled?
What happens when the volume pot is at its max position?
The sample rate that comes in is the same sample rate that goes out.

When pot is at max gain is 0dB, when pot is min muted, in between gain adjusts between 0 and -80dB in 0.5dB steps.

I would need to convert from a 3.3V AES3 output.
The 110/75 transformer should already bring that down to about 2.7V, is that acceptable?
Per the data sheet the device can accept voltages up to 3.6 V, because I am running the device from 3.3. So 2.7 V will be fine.


Yep, I have one of those based on the Xmos XU208. How does that volume control work, is it also bit perfect? Does it use the upper 8 bits of the 32 bit word?
Yes it is "bit-perfect", the SRC4193 uses a 28-bit data path. Also see above.
 
Last edited:

Krunok

Major Contributor
Joined
Mar 25, 2018
Messages
4,600
Likes
3,065
Location
Zg, Cro
Yes it is "bit-perfect", the SRC4193 uses a 28-bit data path. Also see above.

That's not what I have asked - my question was related to your advice to use USB to SPDIF bridge to control volume. I have one such device based on XMOS XU208 chip and my question was if such volume control would also be bit perfect?
 
OP
orchardaudio

orchardaudio

Addicted to Fun and Learning
Audio Company
Joined
Aug 24, 2018
Messages
853
Likes
1,242
Location
Succasunna, NJ
That's not what I have asked - my question was related to your advice to use USB to SPDIF bridge to control volume. I have one such device based on XMOS XU208 chip and my question was if such volume control would also be bit perfect?
Based on my experience with XMOS it should be, but I would double check with the manufacturer of the device that you are using.
 

pos

Addicted to Fun and Learning
Forum Donor
Joined
Feb 13, 2018
Messages
572
Likes
718
They should minus very small tolerance difference in the delays from board to board.
Will it be somehting like up to 1 sample at the incoming sampling rate?
No drift over time?

The sample rate that comes in is the same sample rate that goes out.
Are you sure that means that the ASRC functionality is disabled?
I am curious: As you had that component why did not use it as an ASRC to 192kHz (à la Benchmark) instead of using the CS8416 to retrieve the original clock?

Per the data sheet the device can accept voltages up to 3.6 V, because I am running the device from 3.3. So 2.7 V will be fine.
Thanks
 
OP
orchardaudio

orchardaudio

Addicted to Fun and Learning
Audio Company
Joined
Aug 24, 2018
Messages
853
Likes
1,242
Location
Succasunna, NJ
Will it be somehting like up to 1 sample at the incoming sampling rate?
No drift over time?
The only way to be 100% sure is to test. There should not be any drift.
Edit:
After giving this some more thought I don't think there's a way to guarantee no drift because the I2S clocks inside each device will be a synchronous to each other. Unless the CS8416 generates the I2S clock synchronous to the incoming spdif.

I am curious: As you had that component why did not use it as an ASRC to 192kHz (à la Benchmark) instead of using the CS8416 to retrieve the original clock?
The design is using the clock from the CS8416, there is a way to configure the SRC4193 such that input sampling rate and output sampling are always 1:1.
 
Last edited:

Krunok

Major Contributor
Joined
Mar 25, 2018
Messages
4,600
Likes
3,065
Location
Zg, Cro
Edit:
After giving this some more thought I don't think there's a way to guarantee no drift because the I2S clocks inside each device will be a synchronous to each other. Unless the CS8416 generates the I2S clock synchronous to the incoming spdif.

Exactly. The only way to avoid drift is to drive them by a single clock.
 
OP
orchardaudio

orchardaudio

Addicted to Fun and Learning
Audio Company
Joined
Aug 24, 2018
Messages
853
Likes
1,242
Location
Succasunna, NJ
Does anybody here know if the CS8416 outputs an I2S clock that is synchronous to the SPdif input?

It is not stated in the data sheet and Cirrus Logic's support is horendous.
 

RayDunzl

Grand Contributor
Central Scrutinizer
Joined
Mar 9, 2016
Messages
13,199
Likes
16,981
Location
Riverview FL
my question was if such volume control would also be bit perfect?

If digital volume change changes the bits ( has to!? ) what does "bit perfect" mean in this context?
 

Krunok

Major Contributor
Joined
Mar 25, 2018
Messages
4,600
Likes
3,065
Location
Zg, Cro
Top Bottom